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Searched refs:ArgLocs (Results 1 – 25 of 35) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp40 ArrayRef<CCValAssign> ArgLocs, in assignVRegs() argument
44 if (!assign(VRegs[i], ArgLocs[ArgLocsStartIndex + i], VT)) in assignVRegs()
56 ArrayRef<CCValAssign> ArgLocs, ArrayRef<CallLowering::ArgInfo> Args) { in handle() argument
78 if (!handleSplit(VRegs, ArgLocs, ArgLocsIndex, Args[ArgsIndex].Regs[0], in handle()
82 if (!assign(Args[ArgsIndex].Regs[0], ArgLocs[ArgLocsIndex], VT)) in handle()
106 ArrayRef<CCValAssign> ArgLocs, unsigned ArgLocsStartIndex,
203 ArrayRef<CCValAssign> ArgLocs, in handleSplit() argument
206 if (!assignVRegs(VRegs, ArgLocs, ArgLocsStartIndex, VT)) in handleSplit()
230 ArrayRef<CCValAssign> ArgLocs, unsigned ArgLocsStartIndex,
314 ArrayRef<CCValAssign> ArgLocs, in handleSplit() argument
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H A DMipsCallLowering.h34 bool handle(ArrayRef<CCValAssign> ArgLocs,
38 bool assignVRegs(ArrayRef<Register> VRegs, ArrayRef<CCValAssign> ArgLocs,
59 ArrayRef<CCValAssign> ArgLocs,
H A DMipsFastISel.cpp1140 SmallVector<CCValAssign, 16> ArgLocs; in processCallArgs() local
1141 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs()
1152 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in processCallArgs()
1153 CCValAssign &VA = ArgLocs[i]; in processCallArgs()
H A DMipsISelLowering.cpp3159 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
3161 CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, *DAG.getContext(), in LowerCall()
3252 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
3254 CCValAssign &VA = ArgLocs[i]; in LowerCall()
3619 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
3620 MipsCCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
3637 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
3638 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
3725 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp273 SmallVector<CCValAssign, 16> ArgLocs; in canLowerReturn() local
275 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn()
500 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArgumentsKernel() local
501 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); in lowerFormalArgumentsKernel()
590 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArguments() local
591 CCState CCInfo(CC, F.isVarArg(), MF, ArgLocs, F.getContext()); in lowerFormalArguments()
718 if (!handleAssignments(Handler, SplitArgs, CCInfo, ArgLocs, B)) in lowerFormalArguments()
1181 SmallVector<CCValAssign, 16> ArgLocs; in lowerTailCall() local
1182 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); in lowerTailCall()
1203 if (!handleAssignments(Handler, OutArgs, CCInfo, ArgLocs, MIRBuilder)) in lowerTailCall()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp237 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
238 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall()
261 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
262 CCValAssign &VA = ArgLocs[i]; in LowerCall()
455 SmallVector<CCValAssign, 16> ArgLocs; in LowerCallArguments() local
456 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCallArguments()
478 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCallArguments()
479 CCValAssign &VA = ArgLocs[i]; in LowerCallArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp521 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
524 M68kCCState CCInfo(*CalleeFunc, CallConv, IsVarArg, MF, ArgLocs, in LowerCall()
560 if (!ArgLocs.back().isMemLoc()) in LowerCall()
563 if (ArgLocs.back().getLocMemOffset() != 0) in LowerCall()
584 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
591 CCValAssign &VA = ArgLocs[i]; in LowerCall()
669 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
670 CCValAssign &VA = ArgLocs[i]; in LowerCall()
878 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
879 M68kCCState CCInfo(MF.getFunction(), CCID, IsVarArg, MF, ArgLocs, in LowerFormalArguments()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp518 SmallVector<CCValAssign, 16> ArgLocs; in determineAndHandleAssignments() local
520 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, F.getContext()); in determineAndHandleAssignments()
524 return handleAssignments(Handler, Args, CCInfo, ArgLocs, MIRBuilder, in determineAndHandleAssignments()
610 SmallVectorImpl<CCValAssign> &ArgLocs, in handleAssignments() argument
621 assert(j < ArgLocs.size() && "Skipped too many arg locs"); in handleAssignments()
622 CCValAssign &VA = ArgLocs[j]; in handleAssignments()
627 Handler.assignCustomValue(Args[i], makeArrayRef(ArgLocs).slice(j)); in handleAssignments()
663 assert((j + (NumParts - 1)) < ArgLocs.size() && in handleAssignments()
676 VA = ArgLocs[j + Part]; in handleAssignments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp315 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
316 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
319 for (auto &VA : ArgLocs) { in LowerFormalArguments()
393 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
394 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
418 e = std::min(static_cast<unsigned>(ArgLocs.size()), MaxArgs); in LowerCall()
420 CCValAssign &VA = ArgLocs[i]; in LowerCall()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp456 SmallVectorImpl<CCValAssign> &ArgLocs, in AnalyzeArguments() argument
627 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local
628 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
630 AnalyzeArguments(CCInfo, ArgLocs, Ins); in LowerCCCArguments()
638 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
639 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments()
706 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
810 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local
811 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
813 AnalyzeArguments(CCInfo, ArgLocs, Outs); in LowerCCCCallTo()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp390 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_32() local
391 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments_32()
399 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i, ++InIdx) { in LowerFormalArguments_32()
400 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_32()
423 CCValAssign &NextVA = ArgLocs[++i]; in LowerFormalArguments_32()
583 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_64() local
584 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments_64()
591 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments_64()
592 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_64()
732 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall_32() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1013 SmallVectorImpl<CCValAssign> &ArgLocs, CCState &CCInfo) { in analyzeArguments() argument
1133 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
1134 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
1141 analyzeArguments(nullptr, &MF.getFunction(), &DL, Ins, ArgLocs, CCInfo); in LowerFormalArguments()
1145 for (CCValAssign &VA : ArgLocs) { in LowerFormalArguments()
1242 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
1243 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall()
1266 analyzeArguments(&CLI, F, &DAG.getDataLayout(), Outs, ArgLocs, CCInfo); in LowerCall()
1279 for (AI = 0, AE = ArgLocs.size(); AI != AE; ++AI) { in LowerCall()
1280 CCValAssign &VA = ArgLocs[AI]; in LowerCall()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp447 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local
448 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
456 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
457 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments()
603 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local
604 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
657 for (unsigned I = 0, J = 0, E = ArgLocs.size(); I != E; ++I) { in LowerCCCCallTo()
658 CCValAssign &VA = ArgLocs[I]; in LowerCCCCallTo()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h394 SmallVectorImpl<CCValAssign> &ArgLocs,
403 const SmallVectorImpl<CCValAssign> &ArgLocs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1114 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local
1115 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
1141 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCCallTo()
1142 CCValAssign &VA = ArgLocs[i]; in LowerCCCCallTo()
1269 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local
1270 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
1294 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
1296 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.cpp404 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
405 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
413 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
414 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
498 unsigned ArgOffset = ArgLocs.size() * 8; in LowerFormalArguments()
548 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
549 CCState CCInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall()
637 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
638 CCValAssign &VA = ArgLocs[i]; in LowerCall()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1879 SmallVector<CCValAssign, 16> ArgLocs; in ProcessCallArgs() local
1880 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context); in ProcessCallArgs()
1886 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in ProcessCallArgs()
1887 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs()
1901 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
1936 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in ProcessCallArgs()
1937 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs()
1985 CCValAssign &NextVA = ArgLocs[++i]; in ProcessCallArgs()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1380 SmallVector<CCValAssign, 16> ArgLocs; in processCallArgs() local
1381 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs()
1390 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in processCallArgs()
1391 CCValAssign &VA = ArgLocs[I]; in processCallArgs()
1428 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in processCallArgs()
1429 CCValAssign &VA = ArgLocs[I]; in processCallArgs()
H A DPPCISelLowering.cpp3985 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_32SVR4() local
3986 PPCCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments_32SVR4()
3998 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments_32SVR4()
3999 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_32SVR4()
4050 unsigned RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC); in LowerFormalArguments_32SVR4()
5672 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall_32SVR4() local
5673 PPCCCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall_32SVR4()
5756 for (unsigned i = 0, RealArgIdx = 0, j = 0, e = ArgLocs.size(); in LowerCall_32SVR4()
5759 CCValAssign &VA = ArgLocs[i]; in LowerCall_32SVR4()
5817 RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(), in LowerCall_32SVR4()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp426 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
427 HexagonCCState CCInfo(CallConv, TreatAsVarArg, MF, ArgLocs, *DAG.getContext(), in LowerCall()
442 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
443 CCValAssign &VA = ArgLocs[i]; in LowerCall()
465 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
466 CCValAssign &VA = ArgLocs[i]; in LowerCall()
788 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
789 HexagonCCState CCInfo(CallConv, TreatAsVarArg, MF, ArgLocs, in LowerFormalArguments()
825 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
826 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp966 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
967 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
982 CCInfo.addLoc(CCValAssign::getMem(ArgLocs.size(), VT.getSimpleVT(), in LowerCall()
1000 assert(ArgLocs[ValNo].getValNo() == ValNo && in LowerCall()
1002 unsigned Offset = ArgLocs[ValNo++].getLocMemOffset(); in LowerCall()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp482 SmallVector<CCValAssign, 16> ArgLocs; in handleMustTailForwardedRegisters() local
483 CCState CCInfo(F.getCallingConv(), /*IsVarArg=*/true, MF, ArgLocs, in handleMustTailForwardedRegisters()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h551 const SmallVector<CCValAssign, 16> &ArgLocs) const;
H A DRISCVISelLowering.cpp7248 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
7249 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
7258 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
7259 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
7282 CCValAssign &PartVA = ArgLocs[i + 1]; in LowerFormalArguments()
7365 const SmallVector<CCValAssign, 16> &ArgLocs) const { in isEligibleForTailCallOptimization()
7393 for (auto &VA : ArgLocs) in isEligibleForTailCallOptimization()
7458 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
7459 CCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
7470 IsTailCall = isEligibleForTailCallOptimization(ArgCCInfo, CLI, MF, ArgLocs); in LowerCall()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1389 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
1390 SystemZCCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
1395 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in LowerFormalArguments()
1397 CCValAssign &VA = ArgLocs[I]; in LowerFormalArguments()
1463 CCValAssign &PartVA = ArgLocs[I + 1]; in LowerFormalArguments()
1518 SmallVectorImpl<CCValAssign> &ArgLocs, in canUseSiblingCall() argument
1523 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in canUseSiblingCall()
1524 CCValAssign &VA = ArgLocs[I]; in canUseSiblingCall()
1562 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
1563 SystemZCCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, Ctx); in LowerCall()
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