| /llvm-project/llvm/test/CodeGen/X86/ |
| H A D | leaFixup64.mir | 173 stackSize: 0
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| H A D | leaFixup32.mir | 96 stackSize: 0
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| H A D | expand-call-rvmarker.mir | 46 stackSize: 8
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| H A D | domain-reassignment.mir | 102 stackSize: 0
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| /llvm-project/llvm/test/CodeGen/VE/Scalar/ |
| H A D | fold-imm-addsl.mir | 26 stackSize: 0
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| H A D | fold-imm-cmpsl.mir | 26 stackSize: 0
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| /llvm-project/llvm/test/CodeGen/PowerPC/ |
| H A D | convert-rr-to-ri-instrs-out-of-range.mir | 235 stackSize: 0
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| H A D | convert-rr-to-ri-instrs.mir | 1037 stackSize: 0
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| H A D | convert-rr-to-ri-instrs-R0-special-handling.mir | 104 stackSize: 0
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| H A D | rlwinm_rldicl_to_andi.mir | 100 stackSize: 0
160 stackSize: 0
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331 stackSize: 0
385 stackSize: 0
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| H A D | alloca-crspill.ll | 34 ; ELFV2: stackSize: 48
35 ; V1ANDAIX: stackSize: 128
36 ; CHECK32: stackSize: 80
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| /llvm-project/libunwind/src/ |
| H A D | CompactUnwinder.hpp | 130 uint32_t stackSize = stackSizeEncoded * 4; in stepWithCompactEncodingFrameless() local
134 stackSize = subl + 4 * stackAdjust; in stepWithCompactEncodingFrameless()
203 uint32_t savedRegisters = registers.getSP() + stackSize - 4 - 4 * regCount; in stepWithCompactEncodingFrameless()
361 uint32_t stackSize = stackSizeEncoded * 8; in stepWithCompactEncodingFrameless() local
365 stackSize = subl + 8 * stackAdjust; in stepWithCompactEncodingFrameless()
434 uint64_t savedRegisters = registers.getSP() + stackSize - 8 - 8 * regCount; in stepWithCompactEncodingFrameless()
535 uint32_t stackSize = in stepWithCompactEncodingFrameless() local
538 uint64_t savedRegisterLoc = registers.getSP() + stackSize; in stepWithCompactEncodingFrameless()
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| /llvm-project/llvm/test/CodeGen/MIR/Generic/ |
| H A D | frame-info.mir | 33 # CHECK-NEXT: stackSize: 0
69 # CHECK-NEXT: stackSize: 4
89 stackSize: 4
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| /llvm-project/llvm/test/CodeGen/AMDGPU/ |
| H A D | shrink-vop3-carry-out.mir | 60 stackSize: 0
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| H A D | fold-imm-f16-f32.mir | 144 stackSize: 0
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| /llvm-project/llvm/test/CodeGen/Lanai/ |
| H A D | peephole-compare.mir | 196 stackSize: 0
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterInfo.cpp | 256 uint64_t stackSize = MF.getFrameInfo().getStackSize(); in eliminateFrameIndex() local
261 << "stackSize : " << stackSize << "\n" in eliminateFrameIndex()
266 eliminateFI(MI, FIOperandNum, FrameIndex, stackSize, spOffset); in eliminateFrameIndex()
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| /llvm-project/llvm/test/CodeGen/Mips/micromips-sizereduction/ |
| H A D | micromips-no-lwp-swp.mir | 35 stackSize: 24
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| /llvm-project/llvm/test/CodeGen/Mips/ |
| H A D | unaligned-memops-mapping.mir | 38 stackSize: 0
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| /llvm-project/llvm/test/CodeGen/Mips/longbranch/ |
| H A D | branch-limits-int-micromipsr6.mir | 159 stackSize: 0
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| H A D | branch-limits-int-mipsr6.mir | 159 stackSize: 0
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| H A D | branch-limits-int-mips64r6.mir | 171 stackSize: 0
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| H A D | branch-limits-int-microMIPS.mir | 115 stackSize: 0
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| /llvm-project/llvm/test/CodeGen/X86/apx/ |
| H A D | domain-reassignment.mir | 102 stackSize: 0
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| /llvm-project/llvm/test/CodeGen/AArch64/ |
| H A D | expand-movi-renamable.mir | 27 stackSize: 32
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