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/llvm-project/polly/lib/External/isl/
H A Disl_scan.c111 int level; in isl_basic_set_scan() local
146 level = 0; in isl_basic_set_scan()
149 while (level >= 0) { in isl_basic_set_scan()
152 res = isl_tab_min(tab, B->row[1 + level], in isl_basic_set_scan()
153 bset->ctx->one, &min->el[level], NULL, 0); in isl_basic_set_scan()
158 isl_seq_neg(B->row[1 + level] + 1, in isl_basic_set_scan()
159 B->row[1 + level] + 1, dim); in isl_basic_set_scan()
160 res = isl_tab_min(tab, B->row[1 + level], in isl_basic_set_scan()
161 bset->ctx->one, &max->el[level], NULL, 0); in isl_basic_set_scan()
162 isl_seq_neg(B->row[1 + level] + 1, in isl_basic_set_scan()
[all …]
H A Disl_sample.c228 __isl_keep isl_vec *min, int level) in compute_min() argument
230 return isl_tab_min(tab, tab->basis->row[1 + level], in compute_min()
231 ctx->one, &min->el[level], NULL, 0); in compute_min()
241 __isl_keep isl_vec *max, int level) in compute_max() argument
246 isl_seq_neg(tab->basis->row[1 + level] + 1, in compute_max()
247 tab->basis->row[1 + level] + 1, dim); in compute_max()
248 res = isl_tab_min(tab, tab->basis->row[1 + level], in compute_max()
249 ctx->one, &max->el[level], NULL, 0); in compute_max()
250 isl_seq_neg(tab->basis->row[1 + level] + 1, in compute_max()
251 tab->basis->row[1 + level] + 1, dim); in compute_max()
[all …]
H A Disl_map_subtract.c313 int level; in basic_map_collect_diff() local
354 level = 0; in basic_map_collect_diff()
357 while (level >= 0) { in basic_map_collect_diff()
358 if (level >= map->n) { in basic_map_collect_diff()
378 level--; in basic_map_collect_diff()
386 if (tab_add_divs(tab, map->p[level], in basic_map_collect_diff()
387 &div_map[level]) < 0) in basic_map_collect_diff()
390 snap[level] = isl_tab_snap(tab); in basic_map_collect_diff()
393 if (tab_add_constraints(tab, map->p[level], in basic_map_collect_diff()
394 div_map[level]) < 0) in basic_map_collect_diff()
[all …]
/llvm-project/clang/test/CodeGenObjC/
H A Dlocal-static-block.m10 … *(^ArrayRecurs)(NSArray *addresses, unsigned long level) = ^(NSArray *addresses, unsigned long le…
15 separatedAddresses = ArrayRecurs((NSArray *)rawAddress, level+1);
21 extern unsigned long level;
25 ArrayRecurs(address, level);
27 … *(^ArrayRecurs)(NSArray *addresses, unsigned long level) = ^(NSArray *addresses, unsigned long le…
32 separatedAddresses = ArrayRecurs((NSArray *)rawAddress, level+1);
36 ArrayRecurs(address, level);
39 … *(^ArrayRecurs)(NSArray *addresses, unsigned long level) = ^(NSArray *addresses, unsigned long le…
44 separatedAddresses = ArrayRecurs((NSArray *)rawAddress, level+1);
48 ArrayRecurs(address, level);
[all …]
/llvm-project/libcxx/test/libcxx/
H A Dtransitive_includes_to_csv.py
/llvm-project/mlir/test/Dialect/Tosa/
H A Dlevel_check.mlir2 // Enable all supported profiles to focus the verification of expected level errors.
9 // expected-error@+1 {{'tosa.argmax' op failed level check: operand rank(shape) <= MAX_RANK}}
17 // expected-error@+1 {{'tosa.reduce_all' op failed level check: operand rank(shape) <= MAX_RANK}}
25 // expected-error@+1 {{'tosa.reduce_any' op failed level check: operand rank(shape) <= MAX_RANK}}
33 // expected-error@+1 {{'tosa.reduce_max' op failed level check: operand rank(shape) <= MAX_RANK}}
41 // expected-error@+1 {{'tosa.reduce_min' op failed level check: operand rank(shape) <= MAX_RANK}}
49 // expected-error@+1 {{'tosa.reduce_prod' op failed level check: operand rank(shape) <= MAX_RANK}}
57 // expected-error@+1 {{'tosa.reduce_sum' op failed level check: operand rank(shape) <= MAX_RANK}}
65 // expected-error@+1 {{'tosa.concat' op failed level check: operand rank(shape) <= MAX_RANK}}
73 // expected-error@+1 {{'tosa.reshape' op failed level chec
[all...]
/llvm-project/llvm/test/MC/Mips/mips3/
H A Dinvalid-mips4.s9 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
32 …$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
34 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
36 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
38 …$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
40 …$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
42 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
44 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
46 …$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
48 …$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
[all …]
H A Dinvalid-mips5.s10 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
44 …$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
46 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
48 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
50 …$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
52 …$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
54 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
56 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
58 …$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
60 …$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
[all …]
/llvm-project/lldb/source/Breakpoint/
H A DWatchpointOptions.cpp119 Stream *s, lldb::DescriptionLevel level) const { in GetCallbackDescription()
122 m_callback_baton_sp->GetDescription(s->AsRawOstream(), level, in GetCallbackDescription()
128 lldb::DescriptionLevel level) const { in GetDescription()
134 if (level == lldb::eDescriptionLevelVerbose) { in GetDescription()
145 m_thread_spec_up->GetDescription(s, level); in GetDescription()
146 else if (level == eDescriptionLevelBrief) in GetDescription()
148 if (level == lldb::eDescriptionLevelFull) { in GetDescription()
154 GetCallbackDescription(s, level); in GetDescription()
158 llvm::raw_ostream &s, lldb::DescriptionLevel level, in GetDescription() argument
162 if (level == eDescriptionLevelBrief) { in GetDescription()
H A DBreakpointLocation.cpp482 lldb::DescriptionLevel level) { in GetDescription()
485 // If the description level is "initial" then the breakpoint is printing out in GetDescription()
488 if (level != eDescriptionLevelInitial) { in GetDescription()
493 if (level == lldb::eDescriptionLevelBrief) in GetDescription()
496 if (level != eDescriptionLevelInitial) in GetDescription()
499 if (level == lldb::eDescriptionLevelVerbose) in GetDescription()
505 if (level == lldb::eDescriptionLevelFull || in GetDescription()
506 level == eDescriptionLevelInitial) { in GetDescription()
572 if (level == lldb::eDescriptionLevelVerbose) { in GetDescription()
578 (level in GetDescription()
480 GetDescription(Stream * s,lldb::DescriptionLevel level) GetDescription() argument
[all...]
/llvm-project/llvm/test/MC/Mips/mips1/
H A Dinvalid-mips5-wrong-error.s38 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
40 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
42 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
44 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
46 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
48 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
50 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
52 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
54 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
56 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
[all …]
/llvm-project/polly/test/ScheduleOptimizer/
H A Drectangular-tiling.ll3 ; RUN: opt %loadNPMPolly -polly-tile-sizes=256,16 -polly-2nd-level-tiling -polly-2nd-level-tile-siz…
4 ; RUN: opt %loadNPMPolly -polly-tile-sizes=256,16 -polly-2nd-level-tiling -polly-2nd-level-tile-siz…
6 ; CHECK: // 1st level tiling - Tiles
9 ; CHECK: // 1st level tiling - Points
19 ; TWOLEVEL: // 1st level tiling - Tiles
22 ; TWOLEVEL: // 1st level tiling - Points
23 ; TWOLEVEL: // 2nd level tiling - Tiles
26 ; TWOLEVEL: // 2nd level tiling - Points
32 ; TWO-PLUS-REGISTER: // 1st level tiling - Tiles
35 ; TWO-PLUS-REGISTER: // 1st level tiling - Points
[all …]
/llvm-project/llvm/test/CodeGen/NVPTX/
H A Dfma-disable.ll1 ; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA
2 ; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL
3 ; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA
4 ; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL
5 ; RUN: %if ptxas && !ptxas-12.0 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=1 | %ptxas-verify %}
6 ; RUN: %if ptxas && !ptxas-12.0 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=0 | %ptxas-verify %}
7 ; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=1 | %ptxas-verify %}
8 ; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=0 | %ptxas-verify %}
/llvm-project/flang/lib/Frontend/
H A DTextDiagnosticBuffer.cpp27 clang::DiagnosticsEngine::Level level, const clang::Diagnostic &info) { in HandleDiagnostic() argument
29 DiagnosticConsumer::HandleDiagnostic(level, info); in HandleDiagnostic()
33 switch (level) { in HandleDiagnostic()
37 all.emplace_back(level, notes.size()); in HandleDiagnostic()
41 all.emplace_back(level, warnings.size()); in HandleDiagnostic()
45 all.emplace_back(level, remarks.size()); in HandleDiagnostic()
50 all.emplace_back(level, errors.size()); in HandleDiagnostic()
H A DTextDiagnosticPrinter.cpp39 clang::DiagnosticsEngine::Level level, in printRemarkOption() argument
45 // We still need to check if the level is a Remark since, an unknown option in printRemarkOption()
47 os << " [" << (level == clang::DiagnosticsEngine::Remark ? "-R" : "-W") in printRemarkOption()
93 clang::DiagnosticsEngine::Level level, const clang::Diagnostic &info) { in HandleDiagnostic()
95 DiagnosticConsumer::HandleDiagnostic(level, info); in HandleDiagnostic()
103 printRemarkOption(diagMessageStream, level, info); in HandleDiagnostic()
115 Fortran::frontend::TextDiagnostic::printDiagnosticLevel(os, level, in HandleDiagnostic()
119 /*IsSupplemental=*/level == clang::DiagnosticsEngine::Note, diagMsg, in HandleDiagnostic()
92 HandleDiagnostic(clang::DiagnosticsEngine::Level level,const clang::Diagnostic & info) HandleDiagnostic() argument
/llvm-project/mlir/test/Dialect/SparseTensor/
H A Dsparse_concat.mlir18 // CHECK-DAG: %[[TMP_1:.*]] = sparse_tensor.positions %[[TMP_arg0]] {level = 0 : index} : tensor…
19 // CHECK-DAG: %[[TMP_2:.*]] = sparse_tensor.coordinates %[[TMP_arg0]] {level = 0 : index} : tens…
20 // CHECK-DAG: %[[TMP_3:.*]] = sparse_tensor.positions %[[TMP_arg0]] {level = 1 : index} : tensor…
21 // CHECK-DAG: %[[TMP_4:.*]] = sparse_tensor.coordinates %[[TMP_arg0]] {level = 1 : index} : tens…
38 // CHECK-DAG: %[[TMP_8:.*]] = sparse_tensor.positions %[[TMP_arg1]] {level = 0 : index} : tensor…
39 // CHECK-DAG: %[[TMP_9:.*]] = sparse_tensor.coordinates %[[TMP_arg1]] {level = 0 : index} : tens…
40 // CHECK-DAG: %[[TMP_10:.*]] = sparse_tensor.positions %[[TMP_arg1]] {level = 1 : index} : tenso…
41 // CHECK-DAG: %[[TMP_11:.*]] = sparse_tensor.coordinates %[[TMP_arg1]] {level = 1 : index} : ten…
59 // CHECK-DAG: %[[TMP_15:.*]] = sparse_tensor.positions %[[TMP_arg2]] {level = 0 : index} : tenso…
60 // CHECK-DAG: %[[TMP_16:.*]] = sparse_tensor.coordinates %[[TMP_arg2]] {level = 0 : index} : ten…
[all …]
/llvm-project/llvm/test/MC/Mips/mips2/
H A Dinvalid-mips32.s9 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
47 …$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
49 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
51 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
53 …$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
55 …$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
57 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
59 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
61 …$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
63 …$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
[all …]
/llvm-project/mlir/test/Dialect/Affine/
H A Dloop-fusion-dependence-check.mlir20 …// expected-remark@-1 {{block-level dependence preventing fusion of loop nest 0 into loop nest 2 a…
29 …// expected-remark@-1 {{block-level dependence preventing fusion of loop nest 2 into loop nest 0 a…
110 …// expected-remark@-1 {{block-level dependence preventing fusion of loop nest 0 into loop nest 1 a…
115 // Should not fuse loop nests '%i0' and '%i1' across top-level store.
119 …// expected-remark@-1 {{block-level dependence preventing fusion of loop nest 1 into loop nest 0 a…
135 …// expected-remark@-1 {{block-level dependence preventing fusion of loop nest 0 into loop nest 1 a…
139 // Should not fuse loop nests '%i0' and '%i1' across top-level load.
144 …// expected-remark@-1 {{block-level dependence preventing fusion of loop nest 1 into loop nest 0 a…
161 …// expected-remark@-1 {{block-level dependence preventing fusion of loop nest 0 into loop nest 1 a…
174 …// expected-remark@-1 {{block-level dependence preventing fusion of loop nest 1 into loop nest 0 a…
[all …]
/llvm-project/libcxxabi/test/
H A Dcatch_multi_level_pointer.pass.cpp92 template <class Throw, class Catch, int level, bool first = false>
120 generate_tests_imp<ThrowTp, Type, level-1>()(); in run_catch_tests()
121 generate_tests_imp<ThrowTp, CType, level-1>()(); in run_catch_tests()
122 generate_tests_imp<ThrowTp, VType, level-1>()(); in run_catch_tests()
123 generate_tests_imp<ThrowTp, CVType, level-1>()(); in run_catch_tests()
134 template <class Throw, class Catch, int level>
135 struct generate_tests : generate_tests_imp<Throw, Catch, level, true> {};
/llvm-project/clang-tools-extra/docs/clang-tidy/checks/bugprone/
H A Dmulti-level-implicit-pointer-conversion.rst1 .. title:: clang-tidy - bugprone-multi-level-implicit-pointer-conversion
3 bugprone-multi-level-implicit-pointer-conversion
11 pointer is later cast to a type with a different level of indirection.
13 a ``void*`` can result in the loss of information about the original level of
16 level of indirection and dereferenced, it may lead to access violations,
35 This results in an implicit pointer level conversion, which could cause issues
39 implicit pointer level conversion, as it allows the developer to explicitly
42 safety of the conversion before using an explicit cast. This extra level of
/llvm-project/flang/test/Semantics/
H A Dget_team.f9018 !___ standard-conforming statements with optional level argument present ___
29 result_team = get_team(level=initial_team)
30 result_team = get_team(level=n)
33 !ERROR: 'level=' argument has unacceptable rank 1
36 !ERROR: Actual argument for 'level=' has bad type 'LOGICAL(4)'
39 !ERROR: Actual argument for 'level=' has bad type 'REAL(4)'
45 !ERROR: Actual argument for 'level=' has bad type 'REAL(4)'
46 result_team = get_team(level=3.4)
52 result_team = get_team(level=initial_team, level
[all...]
/llvm-project/llvm/test/tools/llvm-objdump/MachO/
H A Dunwind-info-x86_64.test3 # The 2nd level index in this file is in compressed form, referring to both
19 # CHECK: Top level indices: (count = 2)
20 # CHECK: [0]: function offset=0x00000d70, 2nd level page offset=0x00000050, LSDA offset=0x000000…
21 # CHECK: [1]: function offset=0x00000eab, 2nd level page offset=0x00000000, LSDA offset=0x000000…
25 # CHECK: Second level indices:
26 # CHECK: Second level index[0]: offset in section=0x00000050, base function offset=0x00000d70
H A Dunwind-info-arm64.test3 # The 2nd level index here is "regular", including all offsets & encodings in
19 # CHECK: Top level indices: (count = 2)
20 # CHECK: [0]: function offset=0x00007d64, 2nd level page offset=0x00000050, LSDA offset=0x00000…
21 # CHECK: [1]: function offset=0x00007eb5, 2nd level page offset=0x00000000, LSDA offset=0x00000…
25 # CHECK: Second level indices:
26 # CHECK: Second level index[0]: offset in section=0x00000050, base function offset=0x00007d64
/llvm-project/mlir/lib/Analysis/Presburger/
H A DSimplex.cpp548 /// that we will need when we "return", into `stack`, increment `level`, and in computeSymbolicIntegerLexMin()
550 /// To "return", we decrement `level` and `continue`. in computeSymbolicIntegerLexMin()
552 /// When there is no stack frame for the current `level`, this indicates that in computeSymbolicIntegerLexMin()
556 unsigned level = 1; in computeSymbolicIntegerLexMin()
565 while (level > 0) { in computeSymbolicIntegerLexMin()
566 assert(level >= stack.size()); in computeSymbolicIntegerLexMin()
567 if (level > stack.size()) { in computeSymbolicIntegerLexMin()
570 --level; in computeSymbolicIntegerLexMin()
576 --level; in computeSymbolicIntegerLexMin()
627 ++level; in computeSymbolicIntegerLexMin()
553 unsigned level = 1; computeSymbolicIntegerLexMin() local
1822 reduceBasis(IntMatrix & basis,unsigned level) reduceBasis() argument
1998 unsigned level = 0; findIntegerSample() local
[all...]
/llvm-project/clang-tools-extra/docs/clang-tidy/checks/readability/
H A Dfunction-cognitive-complexity.rst67 Nesting level
70 While by itself the nesting level does not change the function's Cognitive
72 The following structures increase the nesting level (by `1`):
101 This is where the previous basic building block, `Nesting level`_, matters.
103 the current `Nesting level`_:
134 if(var) // +1, nesting level +1
144 if(var1) { // +1, nesting level +1
145 if(var2) // +2 (1 + current nesting level of 1), nesting level +1
155 increase to the complexity of the function and the current nesting level.

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