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Searched refs:VB (Results 1 – 25 of 44) sorted by relevance

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/llvm-project/libcxx/test/std/containers/sequences/vector.bool/
H A Dcompare.pass.cpp24 typedef std::vector<bool> VB; in test() typedef
26 const VB v1, v2; in test()
30 const VB v1(1, true); in test()
31 const VB v2(1, true); in test()
35 const VB v1(1, false); in test()
36 const VB v2(1, true); in test()
40 const VB v1, v2(1, true); in test()
46 const VB v1(items1, items1 + 3); in test()
47 const VB v2(items2, items2 + 3); in test()
53 const VB v1(items1, items1 + 3); in test()
[all …]
/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrAltivec.td292 : VXForm_1<xo, (outs vrrc:$VD), (ins vrrc:$VA, vrrc:$VB),
293 !strconcat(opc, " $VD, $VA, $VB"), IIC_VecFP,
294 [(set Ty:$VD, (IntID Ty:$VA, Ty:$VB))]>;
300 : VXForm_1<xo, (outs vrrc:$VD), (ins vrrc:$VA, vrrc:$VB),
301 !strconcat(opc, " $VD, $VA, $VB"), IIC_VecFP,
302 [(set OutTy:$VD, (IntID InTy:$VA, InTy:$VB))]>;
308 : VXForm_1<xo, (outs vrrc:$VD), (ins vrrc:$VA, vrrc:$VB),
309 !strconcat(opc, " $VD, $VA, $VB"), IIC_VecFP,
310 [(set OutTy:$VD, (IntID In1Ty:$VA, In2Ty:$VB))]>;
314 : VXForm_2<xo, (outs vrrc:$VD), (ins vrrc:$VB),
[all …]
H A DPPCInstrP10.td161 // VX-Form: [ PO VT R VB RC XO ]
166 bits<5> VB;
173 let Inst{16-20} = VB;
368 bits<5> VB;
376 let Inst{16-20} = VB;
384 : VXForm_1<xo, (outs vrrc:$VD), (ins vrrc:$VDi, gprc:$VA, vrrc:$VB),
385 !strconcat(opc, " $VD, $VA, $VB"), IIC_VecGeneral, pattern>,
391 : VXForm_1<xo, (outs vrrc:$VD), (ins vrrc:$VDi, gprc:$VA, gprc:$VB),
392 !strconcat(opc, " $VD, $VA, $VB"), IIC_VecGeneral, pattern>,
401 bits<5> VB;
[all...]
H A DPPCInstrFormats.td1036 bits<5> VB;
1042 let Inst{16-20} = VB;
2057 bits<5> VB;
2063 let Inst{16-20} = VB;
2071 let VB = VD;
2079 bits<5> VB;
2085 let Inst{16-20} = VB;
2117 /// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr.
2121 bits<5> VB;
2127 let Inst{16-20} = VB;
[all...]
/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dvec_xxpermdi.ll68 define <2 x double> @test_le_vec_xxpermdi_v2f64_v2f64_0(<2 x double> %VA, <2 x double> %VB) {
70 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 3, i32 1>
77 define <2 x double> @test_le_vec_xxpermdi_v2f64_v2f64_1(<2 x double> %VA, <2 x double> %VB) {
79 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 2, i32 1>
86 define <2 x double> @test_le_vec_xxpermdi_v2f64_v2f64_2(<2 x double> %VA, <2 x double> %VB) {
88 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 3, i32 0>
95 define <2 x double> @test_le_vec_xxpermdi_v2f64_v2f64_3(<2 x double> %VA, <2 x double> %VB) {
97 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 2, i32 0>
104 define <2 x double> @test_le_swap_vec_xxpermdi_v2f64_v2f64_0(<2 x double> %VA, <2 x double> %VB) {
106 %0 = shufflevector <2 x double> %VA, <2 x double> %VB,<2 x i32> <i32 1, i32 3>
[all …]
H A Dvec_sldwi.ll68 define <4 x i32> @check_le_vec_sldwi_va_vb_0(<4 x i32> %VA, <4 x i32> %VB) {
70 %0 = shufflevector <4 x i32> %VA, <4 x i32> %VB, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
76 define <4 x i32> @check_le_vec_sldwi_va_vb_1(<4 x i32> %VA, <4 x i32> %VB) {
78 %0 = shufflevector <4 x i32> %VA, <4 x i32> %VB, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
85 define <4 x i32> @check_le_vec_sldwi_va_vb_2(<4 x i32> %VA, <4 x i32> %VB) {
87 %0 = shufflevector <4 x i32> %VA, <4 x i32> %VB, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
94 define <4 x i32> @check_le_vec_sldwi_va_vb_3(<4 x i32> %VA, <4 x i32> %VB) {
96 %0 = shufflevector <4 x i32> %VA, <4 x i32> %VB, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
103 define <4 x i32> @check_le_swap_vec_sldwi_va_vb_0(<4 x i32> %VA, <4 x i32> %VB) {
105 %0 = shufflevector <4 x i32> %VA, <4 x i32> %VB, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
[all …]
/llvm-project/clang/test/SemaCXX/
H A Ddestructor.cpp235 struct VB { struct
237 virtual ~VB();
240 struct VD: VB {};
242 struct VF final: VB {};
256 void use(VB&);
262 VB vb; use(vb); in nowarnstack()
289 VB* vb = new VB[4]; in nowarnarray()
316 VB* vb = new VB(); in nowarn0()
[all...]
/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DSValBuilder.cpp633 SValBuilder &VB;
638 EvalCastVisitor(SValBuilder &VB, QualType CastTy, QualType OriginalTy)
639 : VB(VB), Context(VB.getContext()), CastTy(CastTy),
670 return VB.makeTruthVal(V.getValue()->getBoolValue(), CastTy); in VisitConcreteInt()
675 VB.getBasicValueFactory().getAPSIntType(CastTy).apply(Value); in VisitConcreteInt()
676 return VB.makeIntVal(Value); in VisitConcreteInt()
682 VB.getBasicValueFactory().getAPSIntType(CastTy).apply(Value); in VisitConcreteInt()
683 return loc::ConcreteInt(VB in VisitConcreteInt()
635 SValBuilder &VB; global() member in __anoncdd9c81f0211::EvalCastVisitor
640 EvalCastVisitor(SValBuilder & VB,QualType CastTy,QualType OriginalTy) EvalCastVisitor() argument
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/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.class.ll12 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
13 ; SI: v_cmp_class_f32_e32 vcc, [[SA]], [[VB]]
27 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
28 ; SI: v_cmp_class_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], |[[SA]]|, [[VB]]
43 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
44 ; SI: v_cmp_class_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], -[[SA]], [[VB]]
59 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
60 ; SI: v_cmp_class_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], -|[[SA]]|, [[VB]]
148 ; SI-DAG: buffer_load_dword [[VB:v[0-9]+]]
149 ; SI: v_cmp_class_f32_e32 vcc, 1.0, [[VB]]
[all …]
H A Dmadmk.ll13 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
14 ; GCN: v_madmk_f32 {{v[0-9]+}}, [[VA]], 0x41200000, [[VB]]
32 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
34 ; GCN-DAG: v_mac_f32_e32 [[VB]], 0x41200000, [[VA]]
64 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
65 ; GCN: v_mac_f32_e32 [[VB]], 4.0, [[VA]]
131 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
133 ; GCN: v_mad_f32 {{v[0-9]+}}, |[[VA]]|, [[SK]], [[VB]]
153 ; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
H A Dllvm.amdgcn.div.fmas.ll22 ; GCN-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
24 ; GCN: v_div_fmas_f32 [[RESULT:v[0-9]+]], [[VA]], [[VB]], [[VC]]
36 ; SI-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
37 ; SI: v_div_fmas_f32 [[RESULT:v[0-9]+]], 1.0, [[VB]], [[VC]]
70 ; GCN-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
71 ; GCN: v_div_fmas_f32 [[RESULT:v[0-9]+]], [[VA]], [[VB]], 1.0
H A Dllvm.amdgcn.div.fixup.ll17 ; GCN-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
18 ; GCN: v_div_fixup_f32 [[RESULT:v[0-9]+]], [[SA]], [[VB]], [[VC]]
H A Dfmin_legacy.ll38 ; GCN-NONAN: v_mov_b32_e32 [[VB:v[0-9]+]], s[[#LOAD + 3]]
40 ; VI-SAFE: v_mov_b32_e32 [[VB:v[0-9]+]], s[[#LOAD + 3]]
45 ; VI-SAFE: v_cmp_ngt_f32_e32 vcc, s[[#LOAD + 2]], [[VB]]
46 ; VI-SAFE: v_cndmask_b32_e32 v{{[0-9]+}}, [[VB]], [[VA]]
48 ; GCN-NONAN: v_min_f32_e32 {{v[0-9]+}}, s[[#LOAD + 2]], [[VB]]
H A Dllvm.amdgcn.fmad.ftz.ll54 ; GCN: v_mov_b32_e32 [[VB:v[0-9]+]], [[B]]
55 ; GCN: v_mac_f32_e32 [[C]], {{s[0-9]+}}, [[VB]]{{$}}
H A Duse-sgpr-multiple-times.ll58 ; GCN: v_mov_b32_e32 [[VB:v[0-9]+]], s[[#LOAD + 3]]
61 ; GCN-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], s[[#LOAD + 2]], [[VA0]], [[VB]]
62 ; GCN-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], s[[#LOAD + 2]], [[VA1]], [[VB]]
H A Dand.ll110 ; SI-DAG: {{buffer|flat}}_load_dword [[VB:v[0-9]+]]
111 ; SI: v_and_b32_e32 v{{[0-9]+}}, [[SA]], [[VB]]
124 ; SI-DAG: {{buffer|flat}}_load_dword [[VB:v[0-9]+]]
125 ; SI: v_and_b32_e32 v{{[0-9]+}}, [[SA]], [[VB]]
/llvm-project/llvm/test/CodeGen/Generic/
H A Dexpand-vp-fp-intrinsics.ll
/llvm-project/llvm/lib/DebugInfo/PDB/
H A DUDTLayout.cpp238 for (auto &VB : VirtualBaseSyms) { in initializeChildren() local
239 int VBPO = VB->getVirtualBasePointerOffset(); in initializeChildren()
241 if (auto VBP = VB->getRawSymbol().getVirtualBaseTableType()) { in initializeChildren()
256 std::make_unique<BaseClassLayout>(*this, Offset, Elide, std::move(VB)); in initializeChildren()
/llvm-project/llvm/test/Transforms/ConstantMerge/
H A Dmerge-dbg.ll18 ; CHECK: [[B]] = !DIGlobalVariableExpression(var: [[VB:![0-9]+]], expr: !DIExpression())
19 ; CHECK: [[VB]] = distinct !DIGlobalVariable(name: "x"
/llvm-project/clang/test/CXX/special/class.dtor/
H A Dp3-0x.cpp145 struct VB : VA struct
146 { virtual ~VB() {} }; in ~VB() argument
/llvm-project/llvm/test/CodeGen/AArch64/
H A Dmisched-fusion-aes.ll96 ; CHECK: aese [[VB:v[0-7].16b]], {{v[0-7].16b}}
97 ; CHECK-NEXT: aesmc [[VB]], [[VB]]
180 ; CHECK: aesd [[VB:v[0-7].16b]], {{v[0-7].16b}}
181 ; CHECK-NEXT: aesimc [[VB]], [[VB]]
222 ; CHECK: aese [[VB:v[0-7].16b]], {{v[0-7].16b}}
223 ; CHECK-NEXT: aesmc [[VB]], [[VB]]
/llvm-project/clang-tools-extra/test/clang-tidy/checkers/modernize/
H A Duse-equals-default-copy.cpp228 struct VB : virtual OL {}; struct
229 struct VBC : VA, VB, virtual OL {
233 VBC(const VBC &Other) : OL(Other), VA(Other), VB(Other) {} in VBC()
241 VB::operator=(Other); in operator =()
/llvm-project/llvm/test/Transforms/SimplifyCFG/
H A Dhoist-common-skip.ll646 ; CHECK-NEXT: [[VB:%.*]] = load i16, ptr [[B]], align 2
650 ; CHECK-NEXT: [[V:%.*]] = phi i16 [ [[VA]], [[IF_THEN]] ], [ [[VB]], [[IF_ELSE]] ]
683 ; CHECK-NEXT: [[VB:%.*]] = load i16, ptr [[B]], align 2
691 ; CHECK-NEXT: [[V:%.*]] = phi i16 [ [[VA]], [[BB0]] ], [ [[VB]], [[BB1]] ], [ [[VC]], [[BB2]] ]
730 ; CHECK-NEXT: [[VB:%.*]] = load i16, ptr [[B:%.*]], align 2
733 ; CHECK-NEXT: [[V:%.*]] = phi i16 [ [[VA]], [[IF_THEN]] ], [ [[VB]], [[IF_ELSE]] ]
772 ; CHECK-NEXT: [[VB:%.*]] = load i16, ptr [[B:%.*]], align 2
778 ; CHECK-NEXT: [[V:%.*]] = phi i16 [ [[VA]], [[BB0]] ], [ [[VB]], [[BB1]] ], [ [[VC]], [[BB2]] ]
823 ; CHECK-NEXT: [[VB:%.*]] = load i16, ptr [[B:%.*]], align 2
827 ; CHECK-NEXT: [[V:%.*]] = phi i16 [ [[VA]], [[IF_THEN]] ], [ [[VB]], [[IF_ELSE]] ]
[all …]
/llvm-project/clang/lib/AST/
H A DCommentParser.cpp818 VerbatimBlockComment *VB = in parseVerbatimBlock() local
849 S.actOnVerbatimBlockFinish(VB, Tok.getLocation(), Info->Name, in parseVerbatimBlock()
854 S.actOnVerbatimBlockFinish(VB, SourceLocation(), "", in parseVerbatimBlock()
858 return VB; in parseVerbatimBlock()
/llvm-project/llvm/test/Demangle/
H A Dms-back-references.test113 ?bar@PR13207@@YAXV?$J@VA@PR13207@@VB@2@@1@@Z
116 ?spam@PR13207@@YAXV?$K@VA@PR13207@@VB@2@VC@2@@1@@Z

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