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Searched refs:Mask (Results 1 – 25 of 591) sorted by relevance

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/llvm-project/llvm/lib/Support/
H A DFloatingPointMode.cpp14 FPClassTest llvm::fneg(FPClassTest Mask) { in fneg() argument
15 FPClassTest NewMask = Mask & fcNan; in fneg()
16 if (Mask & fcNegInf) in fneg()
18 if (Mask & fcNegNormal) in fneg()
20 if (Mask & fcNegSubnormal) in fneg()
22 if (Mask & fcNegZero) in fneg()
24 if (Mask & fcPosZero) in fneg()
26 if (Mask & fcPosSubnormal) in fneg()
28 if (Mask & fcPosNormal) in fneg()
30 if (Mask & fcPosInf) in fneg()
[all …]
/llvm-project/llvm/include/llvm/MC/
H A DLaneBitmask.h47 explicit constexpr LaneBitmask(Type V) : Mask(V) {} in LaneBitmask()
49 constexpr bool operator== (LaneBitmask M) const { return Mask == M.Mask; }
50 constexpr bool operator!= (LaneBitmask M) const { return Mask != M.Mask; }
51 constexpr bool operator< (LaneBitmask M) const { return Mask < M.Mask; }
52 constexpr bool none() const { return Mask == 0; } in none()
53 constexpr bool any() const { return Mask != 0; } in any()
54 constexpr bool all() const { return ~Mask == 0; } in all()
57 return LaneBitmask(~Mask);
60 return LaneBitmask(Mask | M.Mask);
63 return LaneBitmask(Mask & M.Mask);
[all …]
/llvm-project/offload/DeviceRTL/src/
H A DUtils.cpp
/llvm-project/openmp/runtime/src/
H A Dkmp_affinity.h24 class Mask : public KMPAffinity::Mask {
28 Mask() { in Mask() function
32 Mask(const Mask &other) = delete; in ~Mask()
33 Mask &operator=(const Mask &other) = delete; in set()
34 ~Mask() { hwloc_bitmap_free(mask); } in is_set()
40 void copy(const KMPAffinity::Mask *src) override { in copy()
41 const Mask *conver in copy()
340 Mask() { mask = (mask_t *)__kmp_allocate(__kmp_affin_mask_size); } Mask() function
560 Mask() { Mask() function
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/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZTDC.cpp98 void converted(Instruction *I, Value *V, int Mask, bool Worthy) {
99 ConvertedInsts[I] = std::make_tuple(V, Mask, Worthy);
206 int Mask = 0; in convertFCmp()
208 Mask |= Masks[WhichConst][0]; in convertFCmp() local
210 Mask |= Masks[WhichConst][1]; in convertFCmp()
212 Mask |= Masks[WhichConst][2]; in convertFCmp()
214 Mask |= Masks[WhichConst][3]; in convertFCmp()
222 Mask &= SystemZ::TDCMASK_PLUS; in convertFCmp()
223 Mask |= Mask >> in convertFCmp()
100 converted(Instruction * I,Value * V,int Mask,bool Worthy) converted() argument
250 int Mask; convertICmp() local
275 int Mask = MaskC->getZExtValue(); convertICmp() local
299 int Mask; convertLogicOp() local
361 int Mask; runOnFunction() local
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/llvm-project/clang/lib/Basic/
H A DNoSanitizeList.cpp30 bool NoSanitizeList::containsGlobal(SanitizerMask Mask, StringRef GlobalName, in containsGlobal() argument
32 return SSCL->inSection(Mask, "global", GlobalName, Category); in containsGlobal()
35 bool NoSanitizeList::containsType(SanitizerMask Mask, StringRef MangledTypeName, in containsType() argument
37 return SSCL->inSection(Mask, "type", MangledTypeName, Category); in containsType()
40 bool NoSanitizeList::containsFunction(SanitizerMask Mask, in containsFunction() argument
42 return SSCL->inSection(Mask, "fun", FunctionName); in containsFunction()
45 bool NoSanitizeList::containsFile(SanitizerMask Mask, StringRef FileName, in containsFile() argument
47 return SSCL->inSection(Mask, "src", FileName, Category); in containsFile()
50 bool NoSanitizeList::containsMainFile(SanitizerMask Mask, StringRef FileName, in containsMainFile() argument
52 return SSCL->inSection(Mask, "mainfile", FileName, Category); in containsMainFile()
[all …]
/llvm-project/clang/test/SemaCXX/
H A Dcrash-GH67914.cpp12 struct Mask;
16 using type = Mask< int, 16 >; // expected-warning 0+ {{}}
34 struct Mask : StaticArrayImpl< Value_, Size_, 1, Mask< Value_, Size_ > > { // expected-note 0+ {{}} struct
36 Mask(T1) {} // expected-note 0+ {{}} in Mask() function
48 template < typename Mask >
49 static Derived_ load_(Mask mask) { in load_()
50 return Derived_{load< Array1 >(mask.a1), Mask{}}; // expected-error 0+ {{}} in load_()
61 template < typename Mask >
62 static Derived_ load_(Mask mask);
66 struct StaticArrayImpl< float, 16, 1, Mask< float, 16 > > : KMaskBase< Derived_ > {}; // expected-e…
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/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DSIDefinesUtils.h29 unsigned Mask = 0; in getShiftMask() local
31 Mask = ~Value; in getShiftMask()
32 for (; !(Mask & 1); Shift++, Mask >>= 1) { in getShiftMask()
35 return std::make_pair(Shift, Mask); in getShiftMask()
44 inline const MCExpr *maskShiftSet(const MCExpr *Val, uint32_t Mask, in maskShiftSet() argument
46 if (Mask) { in maskShiftSet()
47 const MCExpr *MaskExpr = MCConstantExpr::create(Mask, Ctx); in maskShiftSet()
63 inline const MCExpr *maskShiftGet(const MCExpr *Val, uint32_t Mask, in maskShiftGet() argument
69 if (Mask) { in maskShiftGet()
70 const MCExpr *MaskExpr = MCConstantExpr::create(Mask, Ctx); in maskShiftGet()
/llvm-project/llvm/lib/Analysis/
H A DVectorUtils.cpp290 int llvm::getSplatIndex(ArrayRef<int> Mask) { in isSplatValue()
292 for (int M : Mask) { in isSplatValue()
373 bool llvm::getShuffleDemandedElts(int SrcWidth, ArrayRef<int> Mask, in widenShuffleMaskElts()
383 if (all_of(Mask, [](int Elt) { return Elt == 0; })) { in widenShuffleMaskElts()
388 for (unsigned I = 0, E = Mask.size(); I != E; ++I) { in widenShuffleMaskElts()
389 int M = Mask[I]; in widenShuffleMaskElts()
410 void llvm::narrowShuffleMaskElts(int Scale, ArrayRef<int> Mask, in widenShuffleMaskElts()
416 ScaledMask.assign(Mask.begin(), Mask.end()); in widenShuffleMaskElts()
421 for (int MaskElt : Mask) { in scaleShuffleMaskElts() argument
229 getSplatIndex(ArrayRef<int> Mask) getSplatIndex() argument
312 getShuffleDemandedElts(int SrcWidth,ArrayRef<int> Mask,const APInt & DemandedElts,APInt & DemandedLHS,APInt & DemandedRHS,bool AllowUndefElts) getShuffleDemandedElts() argument
349 narrowShuffleMaskElts(int Scale,ArrayRef<int> Mask,SmallVectorImpl<int> & ScaledMask) narrowShuffleMaskElts() argument
370 widenShuffleMaskElts(int Scale,ArrayRef<int> Mask,SmallVectorImpl<int> & ScaledMask) widenShuffleMaskElts() argument
446 getShuffleMaskWithWidestElts(ArrayRef<int> Mask,SmallVectorImpl<int> & ScaledMask) getShuffleMaskWithWidestElts() argument
461 processShuffleMasks(ArrayRef<int> Mask,unsigned NumOfSrcRegs,unsigned NumOfDestRegs,unsigned NumOfUsedRegs,function_ref<void ()> NoInputAction,function_ref<void (ArrayRef<int>,unsigned,unsigned)> SingleInputAction,function_ref<void (ArrayRef<int>,unsigned,unsigned)> ManyInputsAction) processShuffleMasks() argument
496 __anon3f982e5a0202(ArrayRef<int> Mask) processShuffleMasks() argument
505 __anon3f982e5a0302(ArrayRef<int> Mask) processShuffleMasks() argument
527 __anon3f982e5a0502(MutableArrayRef<int> Mask) processShuffleMasks() argument
872 SmallVector<Constant *, 16> Mask; createBitMaskForGaps() local
894 SmallVector<int, 16> Mask; createInterleaveMask() local
904 SmallVector<int, 16> Mask; createStrideMask() local
914 SmallVector<int, 16> Mask; createSequentialMask() local
924 createUnaryMask(ArrayRef<int> Mask,unsigned NumElts) createUnaryMask() argument
994 maskIsAllZeroOrUndef(Value * Mask) maskIsAllZeroOrUndef() argument
1020 maskIsAllOneOrUndef(Value * Mask) maskIsAllOneOrUndef() argument
1046 maskContainsAllOneOrUndef(Value * Mask) maskContainsAllOneOrUndef() argument
1073 possiblyDemandedEltsInMask(Value * Mask) possiblyDemandedEltsInMask() argument
[all...]
H A DCmpInstAnalysis.cpp106 Result.Mask = APInt::getSignMask(C.getBitWidth()); in decomposeBitTestICmp()
115 Result.Mask = -FlippedSign; in decomposeBitTestICmp()
123 Result.Mask = FlippedSign; in decomposeBitTestICmp()
134 Result.Mask = -C; in decomposeBitTestICmp()
142 Result.Mask = C; in decomposeBitTestICmp()
160 Result.Mask = Result.Mask.zext(X->getType()->getScalarSizeInBits());
78 decomposeBitTestICmp(Value * LHS,Value * RHS,CmpInst::Predicate & Pred,Value * & X,APInt & Mask,bool LookThruTrunc) decomposeBitTestICmp() argument
/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIModeRegister.cpp30 // Mask is a bitmask where a '1' indicates the corresponding Mode bit has a
32 unsigned Mask = 0; member
37 Status(unsigned NewMask, unsigned NewMode) : Mask(NewMask), Mode(NewMode) { in Status()
38 Mode &= Mask; in Status()
44 return Status((Mask | S.Mask), ((Mode & ~S.Mask) | (S.Mode & S.Mask))); in merge()
50 return Status(Mask & ~newMask, Mode & ~newMask); in mergeUnknown()
56 unsigned NewMask = (Mask in intersect()
283 unsigned Mask = maskTrailingOnes<unsigned>(Width) << Offset; processBlockPhase1() local
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H A DAMDGPUArgumentUsageInfo.h36 unsigned Mask;
42 ArgDescriptor(unsigned Val = 0, unsigned Mask = ~0u, bool IsStack = false,
44 : Reg(Val), Mask(Mask), IsStack(IsStack), IsSet(IsSet) {}
46 static ArgDescriptor createRegister(Register Reg, unsigned Mask = ~0u) {
47 return ArgDescriptor(Reg, Mask, false, true);
50 static ArgDescriptor createStack(unsigned Offset, unsigned Mask = ~0u) {
51 return ArgDescriptor(Offset, Mask, true, true);
54 static ArgDescriptor createArg(const ArgDescriptor &Arg, unsigned Mask) { in createArg()
55 return ArgDescriptor(Arg.Reg, Mask, Ar in createArg()
35 unsigned Mask; global() member
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/llvm-project/llvm/lib/Target/M68k/
H A DM68kCollapseMOVEMPass.cpp49 unsigned Mask; member in __anon7c7b1b820111::MOVEMState
57 Mask(0), Access(AccessTy::None) {} in MOVEMState()
86 unsigned getMask() const { return Mask; } in getMask()
97 if (NewMask > Mask) { in classifyUpdateByMask()
99 } else if (NewMask < Mask) { in classifyUpdateByMask()
136 assert(!(Value & Mask) && in updateMask()
138 Mask |= Value; in updateMask()
204 MOVEMState &State, unsigned Mask, int Offset, unsigned Reg, in ProcessMI() argument
211 State.update(Offset, Mask)) { in ProcessMI()
219 return ProcessMI(MBB, MI, State, Mask, Offset, Reg, IsStore); in ProcessMI()
[all …]
/llvm-project/llvm/unittests/IR/
H A DVectorBuilderTest.cpp30 Value *&Mask, Value *&EVL) { in createBuilderModule() argument
39 Mask = Func->getArg(0); in createBuilderModule()
51 Value *Mask, *EVL; in TEST_F() local
52 auto Mod = createBuilderModule(F, BB, Mask, EVL); in TEST_F()
56 VBuild.setMask(Mask).setEVL(EVL); in TEST_F()
74 ASSERT_EQ(VPIntrin->getMaskParam(), Mask); \ in TEST_F()
101 Value *Mask, *EVL; in TEST_F() local
102 auto Mod = createBuilderModule(F, BB, Mask, EVL); in TEST_F()
147 Value *Mask, *EVL; in TEST_F() local
148 auto Mod = createBuilderModule(F, BB, Mask, EVL); in TEST_F()
[all …]
/llvm-project/clang/include/clang/Basic/
H A DXRayInstr.h50 return Mask & K; in has()
53 bool hasOneOf(XRayInstrMask K) const { return Mask & K; } in hasOneOf()
56 Mask = Value ? (Mask | K) : (Mask & ~K); in set()
59 void clear(XRayInstrMask K = XRayInstrKind::All) { Mask &= ~K; }
61 bool empty() const { return Mask == 0; } in empty()
63 bool full() const { return Mask == XRayInstrKind::All; } in full()
65 XRayInstrMask Mask = 0; member
/llvm-project/llvm/lib/CodeGen/
H A DRDFRegisters.cpp57 UnitInfos[U].Mask = LaneBitmask::getAll(); in PhysicalRegisterInfo()
64 UI.Mask = P.second; in PhysicalRegisterInfo()
133 if (RR.Mask.none()) in getUnits()
137 if ((M & RR.Mask).any()) in getUnits()
169 return RegisterRef(R, TRI.composeSubRegIndexLaneMask(Idx, RR.Mask)); in mapTo()
174 LaneBitmask M = TRI.reverseComposeSubRegIndexLaneMask(Idx, RR.Mask); in mapTo()
187 return A.Mask == B.Mask; in equal_to()
198 if ((AMask & A.Mask).any() && (BMask & B.Mask).any()) { in equal_to()
207 if ((AMask & A.Mask).none()) in equal_to()
209 if ((BMask & B.Mask).none()) in equal_to()
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/llvm-project/llvm/lib/Transforms/Scalar/
H A DScalarizeMaskedMemIntrin.cpp93 static bool isConstantIntVector(Value *Mask) { in isConstantIntVector()
94 Constant *C = dyn_cast<Constant>(Mask); in isConstantIntVector()
98 unsigned NumElts = cast<FixedVectorType>(Mask->getType())->getNumElements(); in isConstantIntVector()
150 Value *Mask = CI->getArgOperand(2); in scalarizeMaskedLoad()
166 if (isa<Constant>(Mask) && cast<Constant>(Mask)->isAllOnesValue()) { in scalarizeMaskedLoad()
183 if (isConstantIntVector(Mask)) { in scalarizeMaskedLoad()
185 if (cast<Constant>(Mask)->getAggregateElement(Idx)->isNullValue()) in scalarizeMaskedLoad()
199 if (isSplatValue(Mask, /*Index=*/0)) { in scalarizeMaskedLoad()
200 Value *Predicate = Builder.CreateExtractElement(Mask, uint64_ in scalarizeMaskedLoad()
91 isConstantIntVector(Value * Mask) isConstantIntVector() argument
147 Value *Mask = CI->getArgOperand(2); scalarizeMaskedLoad() local
209 Value *Mask = Builder.getInt(APInt::getOneBitSet( scalarizeMaskedLoad() local
286 Value *Mask = CI->getArgOperand(3); scalarizeMaskedStore() local
339 Value *Mask = Builder.getInt(APInt::getOneBitSet( scalarizeMaskedStore() local
409 Value *Mask = CI->getArgOperand(2); scalarizeMaskedGather() local
461 Value *Mask = Builder.getInt(APInt::getOneBitSet( scalarizeMaskedGather() local
540 Value *Mask = CI->getArgOperand(3); scalarizeMaskedScatter() local
588 Value *Mask = Builder.getInt(APInt::getOneBitSet( scalarizeMaskedScatter() local
628 Value *Mask = CI->getArgOperand(1); scalarizeMaskedExpandLoad() local
699 Value *Mask = Builder.getInt(APInt::getOneBitSet( scalarizeMaskedExpandLoad() local
762 Value *Mask = CI->getArgOperand(2); scalarizeMaskedCompressStore() local
814 Value *Mask = Builder.getInt(APInt::getOneBitSet( scalarizeMaskedCompressStore() local
873 Value *Mask = CI->getArgOperand(2); scalarizeMaskedVectorHistogram() local
[all...]
/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVVLPatterns.td808 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
812 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
825 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
839 wti.Vector, vti.Vector, vti.Vector, vti.Mask,
843 wti.Vector, vti.Vector, vti.Vector, vti.Mask,
862 wti.Vector, vti.Vector, wti.Mask,
866 wti.Vector, wti.Vector, vti.Vector, vti.Mask,
870 wti.Vector, wti.Vector, vti.Vector, vti.Mask,
938 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
942 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
[all...]
/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMWinCOFFStreamer.cpp93 void emitARMWinCFISaveRegMask(unsigned Mask, bool Wide) override;
141 void ARMTargetWinCOFFStreamer::emitARMWinCFISaveRegMask(unsigned Mask, in emitARMWinCFIAllocStack()
143 assert(Mask != 0);
144 int Lr = (Mask & 0x4000) ? 1 : 0; in emitARMWinCFISaveRegMask() argument
145 Mask &= ~0x4000; in emitARMWinCFISaveRegMask()
147 assert((Mask & ~0x1fff) == 0); in emitARMWinCFISaveRegMask()
149 assert((Mask & ~0x00ff) == 0); in emitARMWinCFISaveRegMask()
150 if (Mask && ((Mask + (1 << 4)) & Mask) in emitARMWinCFISaveRegMask()
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/llvm-project/clang/lib/CodeGen/
H A DSanitizerMetadata.cpp28 static SanitizerMask expandKernelSanitizerMasks(SanitizerMask Mask) { in isAsanHwasanOrMemTag()
29 if (Mask & (SanitizerKind::Address | SanitizerKind::KernelAddress))
30 Mask |= SanitizerKind::Address | SanitizerKind::KernelAddress; in expandKernelSanitizerMasks() argument
32 return Mask; in expandKernelSanitizerMasks()
75 FsanitizeArgument.Mask = expandKernelSanitizerMasks(FsanitizeArgument.Mask); in reportGlobal()
78 FsanitizeArgument.Mask}; in reportGlobal()
86 FsanitizeArgument.Mask & SanitizerKind::Address, GV, Loc, Ty); in reportGlobal()
90 FsanitizeArgument.Mask & SanitizerKind::HWAddress, GV, Loc, Ty); in reportGlobal()
93 Meta.Memtag |= static_cast<bool>(FsanitizeArgument.Mask in reportGlobal()
[all...]
/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineVectorOps.cpp622 SmallVectorImpl<int> &Mask) { in collectSingleShuffleElements() argument
628 Mask.assign(NumElts, -1); in collectSingleShuffleElements()
634 Mask.push_back(i); in collectSingleShuffleElements()
640 Mask.push_back(i + NumElts); in collectSingleShuffleElements()
657 if (collectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { in collectSingleShuffleElements()
659 Mask[InsertedIdx] = -1; in collectSingleShuffleElements()
673 if (collectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { in collectSingleShuffleElements()
676 Mask[InsertedIdx % NumElts] = ExtractedIdx; in collectSingleShuffleElements()
679 Mask[InsertedIdx % NumElts] = ExtractedIdx + NumLHSElts; in collectSingleShuffleElements()
774 /// left and right vectors of the proposed shuffle (or 0), and set the Mask
781 collectShuffleElements(Value * V,SmallVectorImpl<int> & Mask,Value * PermittedRHS,InstCombinerImpl & IC,bool & Rerun) collectShuffleElements() argument
1277 SmallVector<int, 16> Mask(NumElements, 0); foldInsSequenceIntoSplat() local
1438 ArrayRef<int> Mask = Shuf->getShuffleMask(); foldConstantInsEltIntoShuffle() local
1479 SmallVector<int, 16> Mask(NumElts); foldConstantInsEltIntoShuffle() local
1707 SmallVector<int, 16> Mask; visitInsertElementInst() local
1761 canEvaluateShuffled(Value * V,ArrayRef<int> Mask,unsigned Depth=5) canEvaluateShuffled() argument
1925 evaluateInDifferentElementOrder(Value * V,ArrayRef<int> Mask,IRBuilderBase & Builder) evaluateInDifferentElementOrder() argument
2034 isShuffleExtractingFromLHS(ShuffleVectorInst & SVI,ArrayRef<int> Mask) isShuffleExtractingFromLHS() argument
2103 SmallVector<int, 16> Mask; foldSelectShuffleOfSelectShuffle() local
2188 ArrayRef<int> Mask = Shuf.getShuffleMask(); foldSelectShuffleWith1Binop() local
2218 ArrayRef<int> Mask = Shuf.getShuffleMask(); canonicalizeInsertSplat() local
2319 ArrayRef<int> Mask = Shuf.getShuffleMask(); foldSelectShuffle() local
2411 ArrayRef<int> Mask = Shuf.getShuffleMask(); foldTruncShuffle() local
2572 ArrayRef<int> Mask; foldIdentityExtractShuffle() local
2610 SmallVector<int, 16> Mask; foldShuffleWithInsert() local
2731 ArrayRef<int> Mask = Shuf.getShuffleMask(); foldIdentityPaddedShuffles() local
2831 ArrayRef<int> Mask = SVI.getShuffleMask(); visitShuffleVectorInst() local
[all...]
/llvm-project/llvm/lib/Target/VE/
H A DVVPISelLowering.cpp64 SDValue Mask; in lowerToVVP() local
71 Mask = Op->getOperand(*MaskIdx); in lowerToVVP()
79 if (!Mask) in lowerToVVP()
80 Mask = CDAG.getConstantMask(Packing, true); in lowerToVVP()
84 return CDAG.getNode(VVPOpcode, LegalVecVT, {Op->getOperand(0), Mask, AVL}); in lowerToVVP()
87 {Op->getOperand(0), Op->getOperand(1), Mask, AVL}); in lowerToVVP()
93 VectorV, Mask, AVL, Op->getFlags()); in lowerToVVP()
105 return CDAG.getNode(VVPOpcode, LegalVecVT, {X, Y, Z, Mask, AVL}); in lowerToVVP()
108 auto Mask = Op->getOperand(0); in lowerToVVP() local
111 return CDAG.getNode(VVPOpcode, LegalVecVT, {OnTrue, OnFalse, Mask, AVL}); in lowerToVVP()
[all …]
/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DResourceManager.cpp51 void DefaultResourceStrategy::used(uint64_t Mask) { in used() argument
52 if (Mask > NextInSequenceMask) { in used()
53 RemovedFromNextInSequence |= Mask; in used()
57 NextInSequenceMask &= (~Mask); in used()
66 uint64_t Mask) in ResourceState() argument
67 : ProcResourceDescIndex(Index), ResourceMask(Mask), in ResourceState()
128 uint64_t Mask = ProcResID2Mask[I]; in ResourceManager() local
129 unsigned Index = getResourceStateIndex(Mask); in ResourceManager()
131 std::make_unique<ResourceState>(*SM.getProcResource(I), I, Mask); in ResourceManager()
136 uint64_t Mask in ResourceManager() local
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/llvm-project/llvm/lib/IR/
H A DInstructions.cpp363 FPClassTest Mask = Attrs.getRetNoFPClass(); in getRetNoFPClass()
366 Mask |= F->getAttributes().getRetNoFPClass();
367 return Mask; in getParamNoFPClass()
371 FPClassTest Mask = Attrs.getParamNoFPClass(i); in getParamNoFPClass()
374 Mask |= F->getAttributes().getParamNoFPClass(i);
375 return Mask; in getRange()
1692 ShuffleVectorInst::ShuffleVectorInst(Value *V1, Value *Mask, const Twine &Name, in ShuffleVectorInst()
1694 : ShuffleVectorInst(V1, createPlaceholderForShuffleVector(V1), Mask, Name, in ShuffleVectorInst()
1697 ShuffleVectorInst::ShuffleVectorInst(Value *V1, ArrayRef<int> Mask, in ShuffleVectorInst()
1700 : ShuffleVectorInst(V1, createPlaceholderForShuffleVector(V1), Mask, Nam in ShuffleVectorInst()
360 FPClassTest Mask = Attrs.getRetNoFPClass(); getRetNoFPClass() local
368 FPClassTest Mask = Attrs.getParamNoFPClass(i); getParamNoFPClass() local
1661 ShuffleVectorInst(Value * V1,Value * Mask,const Twine & Name,InsertPosition InsertBefore) ShuffleVectorInst() argument
1666 ShuffleVectorInst(Value * V1,ArrayRef<int> Mask,const Twine & Name,InsertPosition InsertBefore) ShuffleVectorInst() argument
1672 ShuffleVectorInst(Value * V1,Value * V2,Value * Mask,const Twine & Name,InsertPosition InsertBefore) ShuffleVectorInst() argument
1691 ShuffleVectorInst(Value * V1,Value * V2,ArrayRef<int> Mask,const Twine & Name,InsertPosition InsertBefore) ShuffleVectorInst() argument
1726 isValidOperands(const Value * V1,const Value * V2,ArrayRef<int> Mask) isValidOperands() argument
1746 isValidOperands(const Value * V1,const Value * V2,const Value * Mask) isValidOperands() argument
1787 getShuffleMask(const Constant * Mask,SmallVectorImpl<int> & Result) getShuffleMask() argument
1821 setShuffleMask(ArrayRef<int> Mask) setShuffleMask() argument
1826 convertShuffleMaskForBitcode(ArrayRef<int> Mask,Type * ResultTy) convertShuffleMaskForBitcode() argument
1846 isSingleSourceMaskImpl(ArrayRef<int> Mask,int NumOpElts) isSingleSourceMaskImpl() argument
1864 isSingleSourceMask(ArrayRef<int> Mask,int NumSrcElts) isSingleSourceMask() argument
1870 isIdentityMaskImpl(ArrayRef<int> Mask,int NumOpElts) isIdentityMaskImpl() argument
1882 isIdentityMask(ArrayRef<int> Mask,int NumSrcElts) isIdentityMask() argument
1890 isReverseMask(ArrayRef<int> Mask,int NumSrcElts) isReverseMask() argument
1910 isZeroEltSplatMask(ArrayRef<int> Mask,int NumSrcElts) isZeroEltSplatMask() argument
1924 isSelectMask(ArrayRef<int> Mask,int NumSrcElts) isSelectMask() argument
1939 isTransposeMask(ArrayRef<int> Mask,int NumSrcElts) isTransposeMask() argument
1975 isSpliceMask(ArrayRef<int> Mask,int NumSrcElts,int & Index) isSpliceMask() argument
2009 isExtractSubvectorMask(ArrayRef<int> Mask,int NumSrcElts,int & Index) isExtractSubvectorMask() argument
2038 isInsertSubvectorMask(ArrayRef<int> Mask,int NumSrcElts,int & NumSubElts,int & Index) isInsertSubvectorMask() argument
2123 ArrayRef<int> Mask = getShuffleMask(); isIdentityWithPadding() local
2171 isReplicationMaskWithParams(ArrayRef<int> Mask,int ReplicationFactor,int VF) isReplicationMaskWithParams() argument
2191 isReplicationMask(ArrayRef<int> Mask,int & ReplicationFactor,int & VF) isReplicationMask() argument
2252 isOneUseSingleSourceMask(ArrayRef<int> Mask,int VF) isOneUseSingleSourceMask() argument
2295 isInterleaveMask(ArrayRef<int> Mask,unsigned Factor,unsigned NumInputElts,SmallVectorImpl<unsigned> & StartIndexes) isInterleaveMask() argument
2378 isDeInterleaveMaskOfFactor(ArrayRef<int> Mask,unsigned Factor,unsigned & Index) isDeInterleaveMaskOfFactor() argument
2404 matchShuffleAsBitRotate(ArrayRef<int> Mask,int NumSubElts) matchShuffleAsBitRotate() argument
2426 isBitRotateMask(ArrayRef<int> Mask,unsigned EltSizeInBits,unsigned MinSubElts,unsigned MaxSubElts,unsigned & NumSubElts,unsigned & RotateAmt) isBitRotateMask() argument
[all...]
/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dsched.barrier.inverted.mask.ll9 ; GCN: After Inverting, SchedGroup Mask: 1008
18 ; GCN: After Inverting, SchedGroup Mask: 2044
27 ; GCN: After Inverting, SchedGroup Mask: 2042
36 ; GCN: After Inverting, SchedGroup Mask: 2038
45 ; GCN: After Inverting, SchedGroup Mask: 1935
54 ; GCN: After Inverting, SchedGroup Mask: 1999
63 ; GCN: After Inverting, SchedGroup Mask: 1967
72 ; GCN: After Inverting, SchedGroup Mask: 1151
81 ; GCN: After Inverting, SchedGroup Mask: 1663
90 ; GCN: After Inverting, SchedGroup Mask: 1407
[all …]

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