| /llvm-project/llvm/include/llvm/Support/ |
| H A D | TargetOpcodes.def | 255 /// Generic ADD instruction. This is an integer add. 259 /// Generic SUB instruction. This is an integer sub. 262 // Generic multiply instruction. 265 // Generic signed division instruction. 268 // Generic unsigned division instruction. 271 // Generic signed remainder instruction. 274 // Generic unsigned remainder instruction. 277 // Generic signed divrem instruction. 280 // Generic unsigned divrem instruction. 283 /// Generic bitwis [all...] |
| /llvm-project/mlir/test/Target/SPIRV/ |
| H A D | cast-ops.mlir | 79 ….*}} = spirv.PtrCastToGeneric {{%.*}} : !spirv.ptr<f32, CrossWorkgroup> to !spirv.ptr<f32, Generic> 80 %0 = spirv.PtrCastToGeneric %arg0 : !spirv.ptr<f32, CrossWorkgroup> to !spirv.ptr<f32, Generic> 83 spirv.func @generic_cast_to_ptr(%arg0 : !spirv.ptr<vector<2xi32>, Generic>) "None" { 84 …// CHECK: {{%.*}} = spirv.GenericCastToPtr {{%.*}} : !spirv.ptr<vector<2xi32>, Generic> to !spirv.… 85 …%0 = spirv.GenericCastToPtr %arg0 : !spirv.ptr<vector<2xi32>, Generic> to !spirv.ptr<vector<2xi32>… 88 spirv.func @generic_cast_to_ptr_explicit(%arg0 : !spirv.ptr<vector<2xi32>, Generic>) "None" { 89 …// CHECK: {{%.*}} = spirv.GenericCastToPtrExplicit {{%.*}} : !spirv.ptr<vector<2xi32>, Generic> to… 90 …%0 = spirv.GenericCastToPtrExplicit %arg0 : !spirv.ptr<vector<2xi32>, Generic> to !spirv.ptr<vecto… 98 spirv.func @covert_ptr_to_u(%arg0 : !spirv.ptr<i32, Generic>) "None" { 99 // CHECK: {{%.*}} = spirv.ConvertPtrToU {{%.*}} : !spirv.ptr<i32, Generic> to i32 [all …]
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| H A D | function-decorations.mlir | 49 …ased_pointer(%{{.*}}: !spirv.ptr<!spirv.ptr<i32, PhysicalStorageBuffer>, Generic> {spirv.decoratio… 51 …%arg0 : !spirv.ptr<!spirv.ptr<i32,PhysicalStorageBuffer>, Generic> { spirv.decoration = #spirv.dec… 61 …rict_pointer(%{{.*}}: !spirv.ptr<!spirv.ptr<i32, PhysicalStorageBuffer>, Generic> {spirv.decoratio… 63 …%arg0 : !spirv.ptr<!spirv.ptr<i32,PhysicalStorageBuffer>, Generic> { spirv.decoration = #spirv.dec…
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| /llvm-project/mlir/test/Dialect/SPIRV/IR/ |
| H A D | cast-ops.mlir | 270 ….*}} = spirv.PtrCastToGeneric {{%.*}} : !spirv.ptr<f32, CrossWorkgroup> to !spirv.ptr<f32, Generic> 271 %0 = spirv.PtrCastToGeneric %arg0 : !spirv.ptr<f32, CrossWorkgroup> to !spirv.ptr<f32, Generic> 278 %0 = spirv.PtrCastToGeneric %arg0 : !spirv.ptr<f32, StorageBuffer> to !spirv.ptr<f32, Generic> 285 // expected-error @+1 {{result type must be of storage class Generic}} 294 …pirv.PtrCastToGeneric %arg0 : !spirv.ptr<f32, CrossWorkgroup> to !spirv.ptr<vector<2xi32>, Generic> 304 func.func @genericcasttoptr1(%arg0 : !spirv.ptr<vector<2xi32>, Generic>) { 305 …// CHECK: {{%.*}} = spirv.GenericCastToPtr {{%.*}} : !spirv.ptr<vector<2xi32>, Generic> to !spirv.… 306 …%0 = spirv.GenericCastToPtr %arg0 : !spirv.ptr<vector<2xi32>, Generic> to !spirv.ptr<vector<2xi32>… 312 // expected-error @+1 {{pointer type must be of storage class Generic}} 319 func.func @genericcasttoptr3(%arg0 : !spirv.ptr<f32, Generic>) { [all …]
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| H A D | function-decorations.mlir | 37 …tion_pointer(%{{.+}}: !spirv.ptr<!spirv.ptr<i32, PhysicalStorageBuffer>, Generic> {spirv.decoratio… 38 …ration_pointer(%arg0: !spirv.ptr<!spirv.ptr<i32, PhysicalStorageBuffer>, Generic> { spirv.decorati… 44 …tion_pointer(%{{.+}}: !spirv.ptr<!spirv.ptr<i32, PhysicalStorageBuffer>, Generic> {spirv.decoratio… 45 …ration_pointer(%arg0: !spirv.ptr<!spirv.ptr<i32, PhysicalStorageBuffer>, Generic> { spirv.decorati…
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| /llvm-project/mlir/test/Conversion/MemRefToSPIRV/ |
| H A D | map-storage-class.mlir | 6 // 1 -> Generic 13 // 1 -> Generic 24 // VULKAN: memref<4xi32, #spirv.storage_class<Generic>> 25 // OPENCL: memref<4xi32, #spirv.storage_class<Generic>> 36 // VULKAN: memref<4xi32, #spirv.storage_class<Generic>> 37 // OPENCL: memref<4xi32, #spirv.storage_class<Generic>> 54 // VULKAN: attr = memref<i32, #spirv.storage_class<Generic>> 55 // OPENCL: attr = memref<i32, #spirv.storage_class<Generic>> 65 …// VULKAN-SAME: (%{{.+}}: memref<f64, #spirv.storage_class<Generic>>, %{{.+}}: memref<4xi32, #spir… 66 …// OPENCL-SAME: (%{{.+}}: memref<f64, #spirv.storage_class<Generic>>, %{{.+}}: memref<4xi32, #spir… [all …]
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| /llvm-project/llvm/include/llvm/Target/ |
| H A D | GenericOpcodes.td | 272 // Generic addition. 280 // Generic subtraction. 288 // Generic multiplication. 296 // Generic signed division. 304 // Generic unsigned division. 312 // Generic signed remainder. 320 // Generic unsigned remainder. 328 // Generic signed division and remainder. 336 // Generic unsigned division and remainder. 344 // Generic bitwis [all...] |
| /llvm-project/llvm/unittests/DebugInfo/LogicalView/ |
| H A D | SelectElementsTest.cpp | 289 StringSet<> Generic; // --select=<Pattern> in checkGenericPatterns() local 290 Generic.insert(Function->getName()); // anyFunction in checkGenericPatterns() 291 Generic.insert(Namespace->getName()); // anyNamespace in checkGenericPatterns() 292 Generic.insert(LocalVariable->getName()); // LocalVariable in checkGenericPatterns() 300 Patterns.addGenericPatterns(Generic); in checkGenericPatterns() 335 StringSet<> Generic; // --select=<Pattern> in checkFlexiblePatterns() local 336 Generic.insert("function"); in checkFlexiblePatterns() 337 Generic.insert("NaMeSpAcE"); in checkFlexiblePatterns() 338 Generic.insert("[a-z]*Variable"); in checkFlexiblePatterns() 339 Generic.insert("[0-9]21"); in checkFlexiblePatterns() [all …]
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| /llvm-project/clang/lib/Index/ |
| H A D | IndexSymbol.cpp | 102 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() 130 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() 136 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() 140 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() 156 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() 161 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() 166 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() 285 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() 290 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() 311 Info.Properties |= (SymbolPropertySet)SymbolProperty::Generic; in getSymbolInfo() [all …]
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| /llvm-project/llvm/test/Transforms/LoopVectorize/X86/ |
| H A D | reg-usage.ll | 15 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 2 registers 16 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 7 registers 20 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 2 registers 21 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 13 registers 57 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 2 registers 58 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 7 registers 62 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 2 registers 63 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 13 registers 97 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 3 registers 98 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 1 registers [all …]
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| /llvm-project/llvm/test/MachineVerifier/ |
| H A D | test_g_zextload.mir | 14 ; CHECK: Bad machine code: Generic memory instruction must access a pointer 18 … ; CHECK: *** Bad machine code: Generic instruction accessing memory must have one mem operand *** 22 ; CHECK: Bad machine code: Generic extload must have a narrower memory type 23 ; CHECK: Bad machine code: Generic extload must have a narrower memory type
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| H A D | test_g_sextload.mir | 14 ; CHECK: Bad machine code: Generic memory instruction must access a pointer 18 … ; CHECK: *** Bad machine code: Generic instruction accessing memory must have one mem operand *** 22 ; CHECK: Bad machine code: Generic extload must have a narrower memory type 23 ; CHECK: Bad machine code: Generic extload must have a narrower memory type
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| H A D | verifier-generic-extend-truncate.mir | 4 # CHECK: Bad machine code: Generic extend/truncate can not operate on pointers 19 # CHECK: Bad machine code: Generic extend has destination type no larger than source 24 # CHECK: Bad machine code: Generic truncate has destination type no smaller than source *** 30 # CHECK: Bad machine code: Generic extend/truncate can not operate on pointers 40 # CHECK: Bad machine code: Generic extend has destination type no larger than source 46 # CHECK: Bad machine code: Generic extend/truncate can not operate on pointers
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| H A D | test_g_icmp.mir | 18 ; CHECK: Bad machine code: Generic vector icmp/fcmp must preserve number of lanes 22 ; CHECK: Bad machine code: Generic vector icmp/fcmp must preserve number of lanes 28 ; CHECK: Bad machine code: Generic vector icmp/fcmp must preserve number of 34 ; CHECK: Bad machine code: Generic vector icmp/fcmp must preserve number of
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| H A D | test_g_fcmp.mir | 18 ; CHECK: Bad machine code: Generic vector icmp/fcmp must preserve number of lanes 22 ; CHECK: Bad machine code: Generic vector icmp/fcmp must preserve number of lanes 28 ; CHECK: Bad machine code: Generic vector icmp/fcmp must preserve number of 34 ; CHECK: Bad machine code: Generic vector icmp/fcmp must preserve number of
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| H A D | generic-vreg-undef-use.mir | 14 ; CHECK: *** Bad machine code: Generic virtual register use cannot be undef *** 18 ; CHECK: *** Bad machine code: Generic virtual register use cannot be undef *** 22 ; CHECK: *** Bad machine code: Generic virtual register use cannot be undef ***
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedA57WriteRes.td | 27 // Define Generic 1 micro-op types 61 // Define Generic 2 micro-op types 196 // Define Generic 3 micro-op types 267 // Define Generic 4 micro-op types 334 // Define Generic 5 micro-op types 378 // Define Generic 6 micro-op types 425 // Define Generic 7 micro-op types 462 // Define Generic 8 micro-op types 488 // Define Generic 9 micro-op types 515 // Define Generic 10 micro-op types [all …]
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| /llvm-project/lldb/tools/debugserver/source/ |
| H A D | DNBError.h | 25 Generic = 0, enumerator 42 explicit DNBError(ValueType err = 0, FlavorType flavor = Generic) 48 m_flavor = Generic; in Clear()
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| H A D | JSONGenerator.h | 35 class Generic; variable 44 typedef std::shared_ptr<Generic> GenericSP; 108 Generic *GetAsGeneric() { in GetAsGeneric() 110 return (Generic *)this; in GetAsGeneric() 369 class Generic : public Object { 371 explicit Generic(void *object = nullptr)
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| /llvm-project/llvm/test/CodeGen/SPIRV/pointers/ |
| H A D | duplicate-type-ptr-def.ll | 5 ; CHECK: %[[#Ptr:]] = OpTypePointer Generic %[[#Char]] 6 ; CHECK: %[[#TypeDef:]] = OpTypePointer Generic %[[#Ptr]] 7 ; CHECK-NOT: %[[#TypeDef]] = OpTypePointer Generic %[[#Ptr]]
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| H A D | type-deduce-call-no-bitcast.ll | 7 ; CHECK-SPIRV-DAG: %[[TyGenPtrChar:.*]] = OpTypePointer Generic %[[TyChar]] 10 ; CHECK-SPIRV-DAG: %[[TyGenPtrPtrChar:.*]] = OpTypePointer Generic %[[TyGenPtrChar]] 15 ; CHECK-SPIRV-DAG: %[[TyPtrStruct:.*]] = OpTypePointer Generic %[[TyStruct]] 16 ; CHECK-SPIRV-DAG: %[[TyPtrLong:.*]] = OpTypePointer Generic %[[TyLong]]
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| /llvm-project/llvm/test/Transforms/LoopVectorize/AArch64/ |
| H A D | i1-reg-usage.ll | 11 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 72 registers 12 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 1 registers 34 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 136 registers 35 ; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 1 registers
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| /llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCAsmInfo.cpp | 23 Generic = 0, enumerator 30 cl::values(clEnumValN(Generic, "generic", "Emit generic NEON assembly"), 74 AssemblerDialect = AsmWriterVariant == Default ? Generic : AsmWriterVariant; in AArch64MCAsmInfoELF()
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| /llvm-project/llvm/test/YAMLParser/ |
| H A D | spec-05-11.test | 4 Generic line break (no glyph) 5 Generic line break (glyphed)
Line separator
Paragraph separator
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| /llvm-project/llvm/docs/GlobalISel/ |
| H A D | GMIR.rst | 3 Generic Machine IR 9 Generic MIR (gMIR) is an intermediate representation that shares the same data 20 Generic Machine Instructions 30 gMIR defines a rich collection of ``Generic Opcodes`` which are target 41 Generic Virtual Registers 49 Generic virtual registers are like virtual registers but they are not assigned a 55 Generic virtual registers can be used with all the virtual register API's 79 See `PR26576 <https://llvm.org/PR26576>`_: [GlobalISel] Generic MachineInstrs 216 Generic Opcode Reference 219 The Generic Opcodes that are available are described at :doc:`GenericOpcode`.
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