Address (full) in projects: llvm-project

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Searched full:address (Results 1 – 25 of 6631) sorted by relevance

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/llvm-project/lldb/include/lldb/Core/
H A D	Address.h	1 //===-- Address.h ------------------------------------------------ C++ --===// 35 /// \class Address Address.h "lldb/Core/Address.h" 36 /// A section + offset based address class. 38 /// The Address class allows addresses to be relative to a section that can 51 /// line tables, function address ranges, lexical block and inlined subroutine 52 /// address ranges, global and static variables) each time an image is loaded 62 class Address { 64 /// Dump styles allow the Address::Dump(Stream *,DumpStyle) const function 65 /// to display Address contents in a variety of ways. 71 /// // address for printf in libSystem.B.dylib as a section name + offset [all …]
H A D	AddressRange.h	12 #include "lldb/Core/Address.h" 24 /// A section + offset based address range class. 35 /// Initialize the address with the supplied \a section, \a offset and \a 40 /// address doesn't have a section or will get resolved later. 46 /// The size in bytes of the address range. 50 /// Construct with a virtual address, section list and byte size. 52 /// Initialize and resolve the address with the supplied virtual address \a 56 /// A virtual address. 59 /// The size in bytes of the address range. 66 /// Construct with a Address object address and byte size. [all …]
/llvm-project/llvm/lib/Target/XCore/Disassembler/
H A D	XCoreDisassembler.cpp	`39 ArrayRef<uint8_t> Bytes, uint64_t Address, 44 static bool readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction16() argument 56 static bool readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction32() argument 75 uint64_t Address, 79 uint64_t Address, 83 uint64_t Address, 87 uint64_t Address, 91 uint64_t Address, 95 uint64_t Address, 99 uint64_t Address, [all …]`
/llvm-project/llvm/test/MC/Mips/
H A D	mips-bad-branches.s	`3 # CHECK: error: branch to misaligned address 5 # CHECK: error: branch to misaligned address 7 # CHECK: error: branch to misaligned address 11 # CHECK: error: branch to misaligned address 13 # CHECK: error: branch to misaligned address 15 # CHECK: error: branch to misaligned address 20 # CHECK: error: branch to misaligned address 22 # CHECK: error: branch to misaligned address 24 # CHECK: error: branch to misaligned address 28 # CHECK: error: branch to misaligned address [all …]`
/llvm-project/llvm/test/tools/llvm-pdbutil/
H A D	explain-dbi-stream.test	30 CHECK-NEXT: Address is in block 15 (allocated). 31 CHECK-NEXT: Address is at offset 0/781 of Stream 3 (DBI Stream). 33 CHECK-NEXT: address is at offset 0/64 of the DBI Stream Header. 38 CHECK-NEXT: Address is in block 15 (allocated). 39 CHECK-NEXT: Address is at offset 4/781 of Stream 3 (DBI Stream). 41 CHECK-NEXT: address is at offset 4/64 of the DBI Stream Header. 46 CHECK-NEXT: Address is in block 15 (allocated). 47 CHECK-NEXT: Address is at offset 8/781 of Stream 3 (DBI Stream). 49 CHECK-NEXT: address is at offset 8/64 of the DBI Stream Header. 54 CHECK-NEXT: Address is in block 15 (allocated). [all …]
/llvm-project/clang/test/SemaOpenCL/
H A D	address-spaces.cl	22 …ssigning '__global int __private' to '__private int __private' changes address space of pointer}} 23 …-error {{assigning '__local int ' to '__private int __private' changes address space of pointer}} 24 …ror {{assigning '__constant int ' to '__private int __private' changes address space of pointer}} 30 // expected-error@-2 {{assigning '__constant int ' to '__generic int __private' changes address s… 32 // expected-error@-4 {{assigning '__constant int ' to '__generic int ' changes address space of p… 40 // expected-error@-2 {{casting '__local int ' to type '__global int ' changes address space of po… 42 …C-style cast from '__local int ' to '__global int ' converts between mismatching address spaces}} 46 // expected-error@-2 {{casting '__constant int ' to type '__global int ' changes address space of… 48 …tyle cast from '__constant int ' to '__global int ' converts between mismatching address spaces}} 52 // expected-error@-2 {{casting 'const __constant int ' to type '__global int ' changes address sp… [all …]
H A D	address-spaces-conversions-cl2.0.cl	1 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DCONSTANT -cl-std=C… 2 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DGLOBAL -cl-std=CL2… 3 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DGENERIC -cl-std=CL… 4 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DCONSTANT -cl-std=c… 5 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DGLOBAL -cl-std=clc… 6 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DGENERIC -cl-std=cl… 7 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DCONSTANT -cl-std=C… 8 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DGLOBAL -cl-std=CL3… 9 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DGENERIC -cl-std=CL… 10 // RUN: %clang_cc1 %s -ffake-address-space-map -verify -pedantic -fsyntax-only -DCONSTANT -cl-std=c… [all …]
H A D	storageclass.cl	15 // expected-error@-2 {{program scope variable must reside in constant address space}} 20 // expected-error@-2 {{program scope variable must reside in constant address space}} 25 // expected-error@-2 {{program scope variable must reside in constant address space}} 32 // expected-error@-2 {{program scope variable must reside in constant address space}} 37 // expected-error@-2 {{program scope variable must reside in constant address space}} 39 // expected-error@-4 {{program scope variable must reside in global or constant address space}} 44 // expected-error@-2 {{program scope variable must reside in constant address space}} 46 // expected-error@-4 {{program scope variable must reside in global or constant address space}} 52 // expected-error@-3 {{program scope variable must reside in constant address space}} 62 // expected-error@-13 {{program scope variable must reside in constant address space}} [all …]
/llvm-project/llvm/test/tools/llvm-objdump/
H A D	warn-on-out-of-range-start-stop-address.test	1 ## This test checks warning messages if --start-address/--stop-address 2 ## do not intersect with address ranges of sections that have the SHF_ALLOC 15 # RUN: llvm-objdump --file-headers --start-address=0x1004 --stop-address=0x1006 %t 2>&1 \ 21 # RUN: llvm-objdump --file-headers --start-address=0x1005 --stop-address=0x1006 %t 2>&1 \ 27 # RUN: llvm-objdump --file-headers --start-address=0x1405 --stop-address=0x1406 %t 2>&1 \ 30 ## - Range starts at 0. (--start-address defaults to 0). 31 # RUN: llvm-objdump --file-headers --stop-address=0x1000 %t 2>&1 \ 34 ## - Range ends at UINT64_MAX. (--stop-address defaults to UINT64_MAX) 35 # RUN: llvm-objdump --file-headers --start-address=0x1500 %t 2>&1 \ 43 # RUN: llvm-objdump --file-headers --start-address=0x1000 --stop-address=0x1004 %t 2>&1 \ [all …]
/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A D	ARMDisassembler.cpp	146 ArrayRef<uint8_t> Bytes, uint64_t Address, 150 uint64_t Address) const override; 154 ArrayRef<uint8_t> Bytes, uint64_t Address, 158 ArrayRef<uint8_t> Bytes, uint64_t Address, 177 uint64_t Address, 180 uint64_t Address, 183 uint64_t Address, 186 uint64_t Address, 190 uint64_t Address, 193 uint64_t Address, 717 checkDecodedInstruction(MCInst & MI,uint64_t & Size,uint64_t Address,raw_ostream & CS,uint32_t Insn,DecodeStatus Result) checkDecodedInstruction() argument 777 getInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction() argument 786 getARMInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getARMInstruction() argument 859 tryAddingSymbolicOperand(uint64_t Address,int32_t Value,bool isBranch,uint64_t InstSize,MCInst & MI,const MCDisassembler * Decoder) tryAddingSymbolicOperand() argument 878 tryAddingPcLoadReferenceComment(uint64_t Address,int Value,const MCDisassembler * Decoder) tryAddingPcLoadReferenceComment() argument 1072 getThumbInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getThumbInstruction() argument 1297 DecodeGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRRegisterClass() argument 1308 DecodeCLRMGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCLRMGPRRegisterClass() argument 1322 DecodeGPRnopcRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRnopcRegisterClass() argument 1335 DecodeGPRnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRnospRegisterClass() argument 1348 DecodeGPRwithAPSRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithAPSRRegisterClass() argument 1363 DecodeGPRwithZRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithZRRegisterClass() argument 1381 DecodeGPRwithZRnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithZRnospRegisterClass() argument 1391 DecodetGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPRRegisterClass() argument 1404 DecodeGPRPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairRegisterClass() argument 1422 DecodeGPRPairnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairnospRegisterClass() argument 1436 DecodeGPRspRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRspRegisterClass() argument 1447 DecodetcGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetcGPRRegisterClass() argument 1478 DecoderGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecoderGPRRegisterClass() argument 1504 DecodeSPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSPRRegisterClass() argument 1515 DecodeHPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHPRRegisterClass() argument 1532 DecodeDPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPRRegisterClass() argument 1548 DecodeDPR_8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPR_8RegisterClass() argument 1556 DecodeSPR_8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSPR_8RegisterClass() argument 1564 DecodeDPR_VFP2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPR_VFP2RegisterClass() argument 1579 DecodeQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeQPRRegisterClass() argument 1600 DecodeDPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPairRegisterClass() argument 1622 DecodeDPairSpacedRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPairSpacedRegisterClass() argument 1633 DecodePredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePredicateOperand() argument 1653 DecodeCCOutOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeCCOutOperand() argument 1663 DecodeSORegImmOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegImmOperand() argument 1701 DecodeSORegRegOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegRegOperand() argument 1737 DecodeRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand() argument 1785 DecodeSPRRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSPRRegListOperand() argument 1810 DecodeDPRRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeDPRRegListOperand() argument 1836 DecodeBitfieldMaskOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBitfieldMaskOperand() argument 1864 DecodeCopMemInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCopMemInstruction() argument 2043 DecodeAddrMode2IdxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode2IdxInstruction() argument 2149 DecodeSORegMemOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegMemOperand() argument 2193 DecodeTSBInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSBInstruction() argument 2206 DecodeAddrMode3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode3Instruction() argument 2398 DecodeRFEInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRFEInstruction() argument 2428 DecodeQADDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeQADDInstruction() argument 2453 DecodeMemMultipleWritebackInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMultipleWritebackInstruction() argument 2545 DecodeHINTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeHINTInstruction() argument 2568 DecodeCPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCPSInstruction() argument 2616 DecodeT2CPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2CPSInstruction() argument 2659 DecodeT2HintSpaceInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2HintSpaceInstruction() argument 2684 DecodeT2MOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2MOVTWInstruction() argument 2709 DecodeArmMOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeArmMOVTWInstruction() argument 2737 DecodeSMLAInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSMLAInstruction() argument 2766 DecodeTSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSTInstruction() argument 2788 DecodeSETPANInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSETPANInstruction() argument 2817 DecodeAddrModeImm12Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrModeImm12Operand() argument 2838 DecodeAddrMode5Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode5Operand() argument 2859 DecodeAddrMode5FP16Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode5FP16Operand() argument 2880 DecodeAddrMode7Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode7Operand() argument 2886 DecodeT2BInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2BInstruction() argument 2913 DecodeBranchImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchImmInstruction() argument 2943 DecodeAddrMode6Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode6Operand() argument 2961 DecodeVLDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDInstruction() argument 3238 DecodeVLDST1Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST1Instruction() argument 3252 DecodeVLDST2Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST2Instruction() argument 3268 DecodeVLDST3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST3Instruction() argument 3282 DecodeVLDST4Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST4Instruction() argument 3293 DecodeVSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSTInstruction() argument 3564 DecodeVLD1DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1DupInstruction() argument 3612 DecodeVLD2DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2DupInstruction() argument 3661 DecodeVLD3DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3DupInstruction() argument 3697 DecodeVLD4DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4DupInstruction() argument 3750 DecodeVMOVModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVModImmInstruction() argument 3796 DecodeMVEModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEModImmInstruction() argument 3825 DecodeMVEVADCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVADCInstruction() argument 3851 DecodeVSHLMaxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSHLMaxInstruction() argument 3871 DecodeShiftRight8Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight8Imm() argument 3878 DecodeShiftRight16Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight16Imm() argument 3885 DecodeShiftRight32Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight32Imm() argument 3892 DecodeShiftRight64Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight64Imm() argument 3899 DecodeTBLInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTBLInstruction() argument 3936 DecodeThumbAddSpecialReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSpecialReg() argument 3961 DecodeThumbBROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBROperand() argument 3970 DecodeT2BROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2BROperand() argument 3979 DecodeThumbCmpBROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbCmpBROperand() argument 3988 DecodeThumbAddrModeRR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeRR() argument 4004 DecodeThumbAddrModeIS(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeIS() argument 4019 DecodeThumbAddrModePC(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModePC() argument 4030 DecodeThumbAddrModeSP(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeSP() argument 4039 DecodeT2AddrModeSOReg(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeSOReg() argument 4069 DecodeT2LoadShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadShift() argument 4153 DecodeT2LoadImm8(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm8() argument 4238 DecodeT2LoadImm12(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm12() argument 4318 DecodeT2LoadT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadT() argument 4358 DecodeT2LoadLabel(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadLabel() argument 4411 DecodeT2Imm8S4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm8S4() argument 4425 DecodeT2Imm7S4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm7S4() argument 4441 DecodeT2AddrModeImm8s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm8s4() argument 4457 DecodeT2AddrModeImm7s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm7s4() argument 4473 DecodeT2AddrModeImm0_1020s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm0_1020s4() argument 4488 DecodeT2Imm8(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm8() argument 4501 DecodeT2Imm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm7() argument 4516 DecodeT2AddrModeImm8(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm8() argument 4564 DecodeTAddrModeImm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeTAddrModeImm7() argument 4581 DecodeT2AddrModeImm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm7() argument 4599 DecodeT2LdStPre(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LdStPre() argument 4661 DecodeT2AddrModeImm12(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm12() argument 4688 DecodeThumbAddSPImm(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPImm() argument 4700 DecodeThumbAddSPReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPReg() argument 4726 DecodeThumbCPS(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbCPS() argument 4738 DecodePostIdxReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodePostIdxReg() argument 4752 DecodeMveAddrModeRQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeRQ() argument 4768 DecodeMveAddrModeQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeQ() argument 4791 DecodeThumbBLXOffset(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBLXOffset() argument 4816 DecodeCoprocessor(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeCoprocessor() argument 4832 DecodeThumbTableBranch(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbTableBranch() argument 4850 DecodeThumb2BCCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumb2BCCInstruction() argument 4892 DecodeT2SOImm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2SOImm() argument 4924 DecodeThumbBCCTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBCCTargetOperand() argument 4933 DecodeThumbBLTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBLTargetOperand() argument 4957 DecodeMemBarrierOption(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMemBarrierOption() argument 4967 DecodeInstSyncBarrierOption(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeInstSyncBarrierOption() argument 4976 DecodeMSRMask(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMSRMask() argument 5078 DecodeBankedReg(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBankedReg() argument 5094 DecodeDoubleRegLoad(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegLoad() argument 5116 DecodeDoubleRegStore(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegStore() argument 5142 DecodeLDRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreImm() argument 5168 DecodeLDRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreReg() argument 5196 DecodeSTRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreImm() argument 5222 DecodeSTRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreReg() argument 5247 DecodeVLD1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1LN() argument 5314 DecodeVST1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST1LN() argument 5379 DecodeVLD2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2LN() argument 5446 DecodeVST2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST2LN() argument 5509 DecodeVLD3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3LN() argument 5579 DecodeVST3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST3LN() argument 5642 DecodeVLD4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4LN() argument 5723 DecodeVST4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST4LN() argument 5795 DecodeVMOVSRR(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVSRR() argument 5821 DecodeVMOVRRS(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVRRS() argument 5847 DecodeIT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeIT() argument 5877 DecodeT2LDRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LDRDPreInstruction() argument 5914 DecodeT2STRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2STRDPreInstruction() argument 5948 DecodeT2Adr(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Adr() argument 5975 DecodeT2ShifterImmOperand(MCInst & Inst,uint32_t Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2ShifterImmOperand() argument 5985 DecodeSwap(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSwap() argument 6012 DecodeVCVTD(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTD() argument 6071 DecodeVCVTQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTQ() argument 6132 DecodeNEONComplexLane64Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeNEONComplexLane64Instruction() argument 6163 DecodeLDR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeLDR() argument 6191 DecoderForMRRC2AndMCRR2(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecoderForMRRC2AndMCRR2() argument 6237 DecodeForVMRSandVMSR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeForVMRSandVMSR() argument 6289 DecodeBFLabelOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBFLabelOperand() argument 6308 DecodeBFAfterTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBFAfterTargetOperand() argument 6320 DecodePredNoALOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePredNoALOperand() argument 6328 DecodeLOLoop(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLOLoop() argument 6391 DecodeLongShiftOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeLongShiftOperand() argument 6404 DecodetGPROddRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPROddRegisterClass() argument 6415 DecodetGPREvenRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPREvenRegisterClass() argument 6427 DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithAPSR_NZCVnospRegisterClass() argument 6443 DecodeVSCCLRM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSCCLRM() argument 6470 DecodeMQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQPRRegisterClass() argument 6486 DecodeMQQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQQPRRegisterClass() argument 6502 DecodeMQQQQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQQQQPRRegisterClass() argument 6513 DecodeVPTMaskOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVPTMaskOperand() argument 6544 DecodeVpredROperand(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVpredROperand() argument 6557 DecodeVpredNOperand(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVpredNOperand() argument 6568 DecodeRestrictedIPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedIPredicateOperand() argument 6575 DecodeRestrictedSPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedSPredicateOperand() argument 6597 DecodeRestrictedUPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedUPredicateOperand() argument 6604 DecodeRestrictedFPPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedFPPredicateOperand() argument 6635 DecodeVCVTImmOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTImmOperand() argument 6679 DecodeVSTRVLDR_SYSREG(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVSTRVLDR_SYSREG() argument 6722 DecodeMVE_MEM_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder,unsigned Rn,OperandDecoder RnDecoder,OperandDecoder AddrDecoder) DecodeMVE_MEM_pre() argument 6743 DecodeMVE_MEM_1_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_1_pre() argument 6753 DecodeMVE_MEM_2_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_2_pre() argument 6763 DecodeMVE_MEM_3_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_3_pre() argument 6773 DecodePowerTwoOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePowerTwoOperand() argument 6786 DecodeMVEPairVectorIndexOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEPairVectorIndexOperand() argument 6796 DecodeMVEVMOVQtoDReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVQtoDReg() argument 6820 DecodeMVEVMOVDRegtoQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVDRegtoQ() argument 6846 DecodeMVEOverlappingLongShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEOverlappingLongShift() argument 6926 DecodeMVEVCVTt1fp(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCVTt1fp() argument 6946 DecodeMVEVCMP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCMP() argument 6983 DecodeMveVCTP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveVCTP() argument 6994 DecodeMVEVPNOT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVPNOT() argument 7003 DecodeT2AddSubSPImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddSubSPImm() argument 7038 DecodeLazyLoadStoreMul(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLazyLoadStoreMul() argument [all...]
/llvm-project/llvm/include/llvm/DebugInfo/GSYM/
H A D	GsymReader.h	35 /// the host system. The Header, address table, address info offsets, and file 91 /// Get the full function info for an address. 94 /// FunctionInfo for a given address. For one off lookups, use the lookup() 98 /// info for a given address and cache it if the process stays around to 102 /// \param Addr A virtual address from the orignal object file to lookup. 106 /// address. 109 /// Get the full function info given an address index. 111 /// \param AddrIdx A address index for an address i [all...]
/llvm-project/bolt/test/X86/
H A D	pseudoprobe-decoding-inline.test	83 CHECK: Pseudo Probe Address Conversion results: 85 CHECK: Address: 0x201750 FUNC: bar Index: 1 Type: Block 86 CHECK: Address: 0x201750 FUNC: bar Index: 4 Type: Block 87 CHECK: Address: 0x201770 FUNC: foo Index: 1 Type: Block 88 CHECK: Address: 0x201770 FUNC: foo Index: 2 Type: Block 89 CHECK: Address: 0x20177d FUNC: foo Index: 5 Type: Block 90 CHECK: Address: 0x20177d FUNC: foo Index: 6 Type: Block 91 CHECK: Address: 0x20177d FUNC: foo Index: 2 Type: Block 92 CHECK: Address: 0x20178b FUNC: foo Index: 3 Type: Block 93 CHECK: Address [all...]
H A D	pseudoprobe-decoding-noinline.test	69 CHECK: Pseudo Probe Address Conversion results: 71 CHECK: Address: 0x201760 FUNC: bar Index: 1 Type: Block 72 CHECK: Address: 0x201760 FUNC: bar Index: 4 Type: Block 73 CHECK: Address: 0x201780 FUNC: foo Index: 1 Type: Block 74 CHECK: Address: 0x201780 FUNC: foo Index: 2 Type: Block 75 CHECK: Address: 0x20178d FUNC: foo Index: 5 Type: Block 76 CHECK: Address: 0x20178d FUNC: foo Index: 6 Type: Block 77 CHECK: Address: 0x20178d FUNC: foo Index: 2 Type: Block 78 CHECK: Address: 0x20179b FUNC: foo Index: 3 Type: Block 79 CHECK: Address [all...]
/llvm-project/clang/lib/CodeGen/
H A D	CGBuilder.h	12 #include "Address.h" 51 friend class Address; 59 llvm::Value emitRawPointerFromAddress(Address Addr) const { in emitRawPointerFromAddress() 64 Address createConstGEP2_32(Address Addr, unsigned Idx0, unsigned Idx1, in createConstGEP2_32() 81 return Address(GEP, GEP->getResultElementType(), in createConstGEP2_32() 108 llvm::LoadInst CreateLoad(Address Addr, const llvm::Twine &Name = "") { 113 llvm::LoadInst CreateLoad(Address Addr, const char Name) { in CreateLoad() 120 llvm::LoadInst CreateLoad(Address Addr, bool IsVolatile, 136 llvm::StoreInst CreateStore(llvm::Value *Val, Address Add 50 friend class Address; global() variable [all...]
/llvm-project/clang/docs/
H A D	SYCLSupport.rst	16 Address space handling 24 section 4.7.7 - `address space classes <https://www.khronos.org/registry/SYCL/specs/sycl-2020/html/… 25 and section 5.9 covers `address space deduction <https://www.khronos.org/registry/SYCL/specs/sycl-2… 26 The SYCL specification allows two modes of address space deduction: "generic as 27 default address space" (see section 5.9.3) and "inferred address space" (see 28 section 5.9.4). Current implementation supports only "generic as default address 32 the address space qualifier inference as detailed in 35 The default address space is "generic-memory", which is a virtual address space 36 that overlaps the global, local, and private address spaces. SYCL mode enables 39 - explicit conversions to/from the default address space from/to the address [all …]
/llvm-project/llvm/lib/Target/SystemZ/Disassembler/
H A D	SystemZDisassembler.cpp	35 ArrayRef<uint8_t> Bytes, uint64_t Address, 60 /// @param Address - The starting address of the instruction 66 /// immediate in the instruction using the Address, Offset and Width. If that 74 uint64_t Address, uint64_t Offset, in tryAddingSymbolicOperand() 77 return Decoder->tryAddingSymbolicOperand(MI, Value, Address, IsBranch, Offset, in tryAddingSymbolicOperand() 97 uint64_t Address, in DecodeGR32BitRegisterClass() 103 uint64_t Address, in DecodeGRH32BitRegisterClass() 109 uint64_t Address, in DecodeGR64BitRegisterClass() 115 uint64_t Address, in DecodeGR128BitRegisterClass() 75 tryAddingSymbolicOperand(int64_t Value,bool IsBranch,uint64_t Address,uint64_t Offset,uint64_t Width,MCInst & MI,const MCDisassembler * Decoder) tryAddingSymbolicOperand() argument 98 DecodeGR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR32BitRegisterClass() argument 104 DecodeGRH32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGRH32BitRegisterClass() argument 110 DecodeGR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR64BitRegisterClass() argument 116 DecodeGR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR128BitRegisterClass() argument 122 DecodeADDR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR32BitRegisterClass() argument 128 DecodeADDR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR64BitRegisterClass() argument 134 DecodeFP32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP32BitRegisterClass() argument 140 DecodeFP64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP64BitRegisterClass() argument 146 DecodeFP128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP128BitRegisterClass() argument 152 DecodeVR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR32BitRegisterClass() argument 158 DecodeVR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR64BitRegisterClass() argument 164 DecodeVR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR128BitRegisterClass() argument 170 DecodeAR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeAR32BitRegisterClass() argument 176 DecodeCR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCR64BitRegisterClass() argument 198 decodeU1ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU1ImmOperand() argument 204 decodeU2ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU2ImmOperand() argument 210 decodeU3ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU3ImmOperand() argument 216 decodeU4ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU4ImmOperand() argument 222 decodeU8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU8ImmOperand() argument 228 decodeU12ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU12ImmOperand() argument 234 decodeU16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU16ImmOperand() argument 240 decodeU32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU32ImmOperand() argument 246 decodeS8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS8ImmOperand() argument 252 decodeS16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS16ImmOperand() argument 258 decodeS20ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS20ImmOperand() argument 264 decodeS32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS32ImmOperand() argument 271 decodeLenOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeLenOperand() argument 281 decodePCDBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,bool isBranch,const MCDisassembler * Decoder) decodePCDBLOperand() argument 294 decodePC12DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC12DBLBranchOperand() argument 300 decodePC16DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC16DBLBranchOperand() argument 306 decodePC24DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC24DBLBranchOperand() argument 312 decodePC32DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLBranchOperand() argument 318 decodePC32DBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLOperand() argument 327 getInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction() argument [all...]
/llvm-project/lldb/source/Core/
H A D	Address.cpp	1 //===-- Address.cpp -------------------------------------------------------===// 9 #include "lldb/Core/Address.h" 64 const Address &address, void dst, size_t dst_len) { in ReadBytes() argument 72 return target_sp->ReadMemory(address, dst, dst_len, error, in ReadBytes() 79 const Address &address, in GetByteOrderAndAddressSize() argument 94 ModuleSP module_sp(address.GetModule()); in GetByteOrderAndAddressSize() 104 const Address &address, uint32_ in ReadUIntMax64() argument 128 ReadAddress(ExecutionContextScope exe_scope,const Address & address,uint32_t pointer_size,Address & deref_so_addr) ReadAddress() argument 164 DumpUInt(ExecutionContextScope * exe_scope,const Address & address,uint32_t byte_size,Stream * strm) DumpUInt() argument 193 ReadCStringFromMemory(ExecutionContextScope * exe_scope,const Address & address,Stream * strm) ReadCStringFromMemory() argument 235 Address::Address(lldb::addr_t abs_addr) : m_section_wp(), m_offset(abs_addr) {} Address() function in Address 237 Address(addr_t address,const SectionList * section_list) Address() argument [all...]
/llvm-project/llvm/tools/llvm-profgen/
H A D	ProfiledBinary.h	61 // Address of the executable segment of the binary. 62 uint64_t Address; member 63 // Index to the sorted code address array of the binary. 65 InstructionPointer(const ProfiledBinary *Binary, uint64_t Address, 106 // Whether the start address is the real entry of the function. 112 // PrologEpilog address tracker, used to filter out broken stack samples 114 // based on the start address and return address. In the future, 130 PrologEpilogSet.insert(IP.Address); in inferPrologAddresses() 134 // Take the last two addresses before the return address a 370 setBaseAddress(uint64_t Address) setBaseAddress() argument 375 canonicalizeVirtualAddress(uint64_t Address) canonicalizeVirtualAddress() argument 393 getInstSize(uint64_t Address) getInstSize() argument 400 addressIsCode(uint64_t Address) addressIsCode() argument 404 addressIsCall(uint64_t Address) addressIsCall() argument 407 addressIsReturn(uint64_t Address) addressIsReturn() argument 410 addressInPrologEpilog(uint64_t Address) addressInPrologEpilog() argument 414 addressIsTransfer(uint64_t Address) addressIsTransfer() argument 446 getIndexForAddr(uint64_t Address) getIndexForAddr() argument 461 findFuncRangeForStartAddr(uint64_t Address) findFuncRangeForStartAddr() argument 469 findFuncRange(uint64_t Address) findFuncRange() argument 482 getRanges(uint64_t Address) getRanges() argument 543 getInlineLeafFrameLoc(uint64_t Address) getInlineLeafFrameLoc() argument 572 getCallProbeForAddr(uint64_t Address) getCallProbeForAddr() argument [all...]
/llvm-project/llvm/test/tools/llvm-objcopy/ELF/
H A D	preserve-segment-contents.test	`72 Address: 0x2000 76 Address: 0x2004 81 Address: 0x2008 85 Address: 0x200C 89 Address: 0x2010 93 Address: 0x2014 97 Address: 0x2018 101 Address: 0x2100 106 Address: 0x2104 109 Address: 0x2108 [all …]`
/llvm-project/lld/test/ELF/
H A D	arm-thunk-largesection.s	4 …lvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x21000 --stop-address=0x2100… 5 …lvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x22004 --stop-address=0x2200… 6 …vm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x1021ff8 --stop-address=0x102… 7 …vm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x2012ff8 --stop-address=0x202… 8 …vm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x3021fec --stop-address=0x302… 12 …lvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x21000 --stop-address=0x2100… 13 …lvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x22004 --stop-address=0x2200… 14 …vm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x1021ff8 --stop-address=0x102… 15 …vm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x2012ff8 --stop-address=0x202… 16 …vm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x3021fec --stop-address=0x302… [all …]
/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A D	MipsDisassembler.cpp	73 ArrayRef<uint8_t> Bytes, uint64_t Address, 82 uint64_t Address, 86 uint64_t Address, 90 uint64_t Address, 94 DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, 98 DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, 102 uint64_t Address, 106 uint64_t Address, 110 uint64_t Address, 114 uint64_t Address, 353 DecodeUImmWithOffset(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeUImmWithOffset() argument 527 DecodeINSVE_DF(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeINSVE_DF() argument 576 DecodeDAHIDATIMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDAHIDATIMMR6() argument 590 DecodeDAHIDATI(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDAHIDATI() argument 605 DecodeAddiGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddiGroupBranch() argument 644 DecodePOP35GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP35GroupBranchMMR6() argument 678 DecodeDaddiGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDaddiGroupBranch() argument 717 DecodePOP37GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP37GroupBranchMMR6() argument 751 DecodePOP65GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP65GroupBranchMMR6() argument 790 DecodePOP75GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP75GroupBranchMMR6() argument 829 DecodeBlezlGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBlezlGroupBranch() argument 872 DecodeBgtzlGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBgtzlGroupBranch() argument 916 DecodeBgtzGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBgtzGroupBranch() argument 965 DecodeBlezGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBlezGroupBranch() argument 1008 DecodeDEXT(MCInst & MI,InsnType Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDEXT() argument 1050 DecodeDINS(MCInst & MI,InsnType Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDINS() argument 1092 DecodeCRC(MCInst & MI,InsnType Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCRC() argument 1107 readInstruction16(ArrayRef<uint8_t> Bytes,uint64_t Address,uint64_t & Size,uint32_t & Insn,bool IsBigEndian) readInstruction16() argument 1127 readInstruction32(ArrayRef<uint8_t> Bytes,uint64_t Address,uint64_t & Size,uint32_t & Insn,bool IsBigEndian,bool IsMicroMips) readInstruction32() argument 1163 getInstruction(MCInst & Instr,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CStream) const getInstruction() argument 1338 DecodeCPU16RegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCPU16RegsRegisterClass() argument 1344 DecodeGPR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPR64RegisterClass() argument 1355 DecodeGPRMM16RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRMM16RegisterClass() argument 1365 DecodeGPRMM16ZeroRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRMM16ZeroRegisterClass() argument 1375 DecodeGPRMM16MovePRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRMM16MovePRegisterClass() argument 1385 DecodeGPR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPR32RegisterClass() argument 1395 DecodePtrRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodePtrRegisterClass() argument 1404 DecodeDSPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDSPRRegisterClass() argument 1410 DecodeFGR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFGR64RegisterClass() argument 1421 DecodeFGR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFGR32RegisterClass() argument 1432 DecodeCCRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCCRRegisterClass() argument 1442 DecodeFCCRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFCCRegisterClass() argument 1452 DecodeFGRCCRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFGRCCRegisterClass() argument 1462 DecodeMem(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMem() argument 1482 DecodeMemEVA(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemEVA() argument 1502 DecodeLoadByte15(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLoadByte15() argument 1518 DecodeCacheOp(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCacheOp() argument 1534 DecodeCacheOpMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCacheOpMM() argument 1550 DecodePrefeOpMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodePrefeOpMM() argument 1566 DecodeCacheeOp_CacheOpR6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCacheeOp_CacheOpR6() argument 1581 DecodeSyncI(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSyncI() argument 1595 DecodeSyncI_MM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSyncI_MM() argument 1608 DecodeSynciR6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSynciR6() argument 1622 DecodeMSA128Mem(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128Mem() argument 1669 DecodeMemMMImm4(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm4() argument 1726 DecodeMemMMSPImm5Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMSPImm5Lsl2() argument 1741 DecodeMemMMGPImm7Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMGPImm7Lsl2() argument 1756 DecodeMemMMReglistImm4Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMReglistImm4Lsl2() argument 1780 DecodeMemMMImm9(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm9() argument 1800 DecodeMemMMImm12(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm12() argument 1834 DecodeMemMMImm16(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm16() argument 1850 DecodeFMem(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMem() argument 1867 DecodeFMemMMR2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMemMMR2() argument 1885 DecodeFMem2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMem2() argument 1901 DecodeFMem3(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMem3() argument 1918 DecodeFMemCop2R6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMemCop2R6() argument 1935 DecodeFMemCop2MMR6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMemCop2MMR6() argument 1952 DecodeSpecial3LlSc(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSpecial3LlSc() argument 1973 DecodeHWRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHWRegsRegisterClass() argument 1983 DecodeAFGR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeAFGR64RegisterClass() argument 1994 DecodeACC64DSPRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeACC64DSPRegisterClass() argument 2005 DecodeHI32DSPRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHI32DSPRegisterClass() argument 2016 DecodeLO32DSPRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeLO32DSPRegisterClass() argument 2027 DecodeMSA128BRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128BRegisterClass() argument 2038 DecodeMSA128HRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128HRegisterClass() argument 2049 DecodeMSA128WRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128WRegisterClass() argument 2060 DecodeMSA128DRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128DRegisterClass() argument 2071 DecodeMSACtrlRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSACtrlRegisterClass() argument 2082 DecodeCOP0RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCOP0RegisterClass() argument 2093 DecodeCOP2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCOP2RegisterClass() argument 2104 DecodeBranchTarget(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget() argument 2112 DecodeBranchTarget1SImm16(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget1SImm16() argument 2120 DecodeJumpTarget(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeJumpTarget() argument 2128 DecodeBranchTarget21(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget21() argument 2137 DecodeBranchTarget21MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget21MM() argument 2146 DecodeBranchTarget26(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget26() argument 2155 DecodeBranchTarget7MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget7MM() argument 2163 DecodeBranchTarget10MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget10MM() argument 2171 DecodeBranchTargetMM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTargetMM() argument 2179 DecodeBranchTarget26MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget26MM() argument 2188 DecodeJumpTargetMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeJumpTargetMM() argument 2196 DecodeJumpTargetXMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeJumpTargetXMM() argument 2204 DecodeAddiur2Simm7(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeAddiur2Simm7() argument 2216 DecodeLi16Imm(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeLi16Imm() argument 2226 DecodePOOL16BEncodedField(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodePOOL16BEncodedField() argument 2234 DecodeUImmWithOffsetAndScale(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeUImmWithOffsetAndScale() argument 2244 DecodeSImmWithOffsetAndScale(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeSImmWithOffsetAndScale() argument 2251 DecodeInsSize(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeInsSize() argument 2263 DecodeSimm19Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm19Lsl2() argument 2270 DecodeSimm18Lsl3(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm18Lsl3() argument 2276 DecodeSimm9SP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm9SP() argument 2291 DecodeANDI16Imm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeANDI16Imm() argument 2302 DecodeRegListOperand(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand() argument 2330 DecodeRegListOperand16(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand16() argument 2354 DecodeMovePOperands(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMovePOperands() argument 2380 DecodeMovePRegPair(MCInst & Inst,unsigned RegPair,uint64_t Address,const MCDisassembler * Decoder) DecodeMovePRegPair() argument 2423 DecodeSimm23Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm23Lsl2() argument 2431 DecodeBgtzGroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBgtzGroupBranchMMR6() argument 2480 DecodeBlezGroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBlezGroupBranchMMR6() argument 2525 DecodeFIXMEInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFIXMEInstruction() argument [all...]
/llvm-project/llvm/include/llvm/DebugInfo/DWARF/
H A D	DWARFDebugRangeList.h	27 /// A beginning address offset. This address offset has the size of an 28 /// address and is relative to the applicable base address of the 30 /// of an address range. 32 /// An ending address offset. This address offset again has the size of 33 /// an address and is relative to the applicable base address of the 35 /// address past the end of the address range. The ending address must 36 /// be greater than or equal to the beginning address. 42 /// which consists of a 0 for the beginning address offset 43 /// and a 0 for the ending address offset. 48 /// A base address selection entry consists of: [all …]
/llvm-project/llvm/test/tools/llvm-xray/X86/Inputs/
H A D	simple-instrmap.yaml	4 - { id: 1, address: 0x1, function: 0x1, kind: function-enter, always-instrument: true} key 5 - { id: 1, address: 0x2, function: 0x1, kind: function-exit, always-instrument: true} key 6 - { id: 2, address: 0x2, function: 0x2, kind: function-enter, always-instrument: true} key 7 - { id: 2, address: 0x3, function: 0x2, kind: function-exit, always-instrument: true} key 8 - { id: 3, address: 0x3, function: 0x3, kind: function-enter, always-instrument: true} key 9 - { id: 3, address: 0x4, function: 0x3, kind: function-exit, always-instrument: true} key 10 - { id: 4, address: 0x4, function: 0x4, kind: function-enter, always-instrument: true} key 11 - { id: 4, address: 0x5, function: 0x4, kind: function-exit, always-instrument: true} key 12 - { id: 5, address: 0x5, function: 0x5, kind: function-enter, always-instrument: true} key 13 - { id: 5, address: 0x6, function: 0x5, kind: function-exit, always-instrument: true} key [all …]
/llvm-project/clang/test/SemaCXX/
H A D	pass-object-size.cpp	23 …int (A)(void ) = &Foo; //expected-error{{cannot take address of function 'Foo' because parameter… in Decls() 24 …int (B)(void ) = Foo; //expected-error{{cannot take address of function 'Foo' because parameter … in Decls() 26 …expected-error{{address of overloaded function 'OvlFoo' does not match required type 'int (void )… in Decls() 27 …expected-error{{address of overloaded function 'OvlFoo' does not match required type 'int (void )… in Decls() 29 …int (E)(void ) = &Statics::Foo; //expected-error{{cannot take address of function 'Foo' because … in Decls() 30 …expected-error{{address of overloaded function 'OvlFoo' does not match required type 'int (void )… in Decls() 32 …int (G)(void ) = &Members::Foo; //expected-error{{cannot take address of function 'Foo' because … in Decls() 33 …expected-error{{address of overloaded function 'OvlFoo' does not match required type 'int (void )… in Decls() 38 …A = &Foo; //expected-error{{cannot take address of function 'Foo' because parameter 1 has pass_obj… in Assigns() 39 …A = Foo; //expected-error{{cannot take address of function 'Foo' because parameter 1 has pass_obje… in Assigns() [all …]
/llvm-project/llvm/test/tools/obj2yaml/ELF/DWARF/
H A D	debug-addr.yaml	3 ## a) Dumping address tables from various object files. 5 ## Dumping address tables from a little endian 64-bit object file. 12 ## Dumping address tables from a big endian 64-bit object file. 19 ## Dumping address tables from a little endian 32-bit object file. 26 ## Dumping address tables from a big endian 32-bit object file. 39 # BASIC-NEXT: - Address: 0x1234 40 # BASIC-NEXT: - Address: 0x5678 46 # BASIC-NEXT: - Address: 0x1234 47 # BASIC-NEXT: - Address: [[ADDR]] 52 # BASIC-NEXT: - Address: 0x1234 [all …]

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