| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 243 static const unsigned NumRegs = std::size(RegList); in CC_X86_32_MCUInReg() local
34 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, CC_X86_32_RegCall_Assign2Regs() local
97 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); CC_X86_VectorCallAssignRegister() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallingConv.cpp | 197 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
24 static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; f64AssignAPCS() local
289 CustomAssignInRegList(unsigned ValNo,MVT ValVT,MVT LocVT,CCValAssign::LocInfo LocInfo,CCState & State,ArrayRef<MCPhysReg> RegList) CustomAssignInRegList() argument
[all...] |
| H A D | Thumb2ITBlockPass.cpp | 83 RegList LocalUses; in INITIALIZE_PASS() typedef
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| H A D | ARMAsmPrinter.cpp | 1222 SmallVector<unsigned, 4> RegList; EmitUnwindingInstruction() local
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| H A D | ARMBaseInstrInfo.cpp | 2559 SmallVector<MachineOperand, 4> RegList; tryFoldSPUpdateIntoPushPop() local
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| /llvm-project/llvm/utils/TableGen/ |
| H A D | CallingConvEmitter.cpp | 160 const ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
213 const ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallingConvention.cpp | 143 ArrayRef<MCPhysReg> RegList; CC_AArch64_Custom_Block() local
[all...] |
| H A D | AArch64RegisterInfo.cpp | 605 __anon7217e52b0202(ArrayRef<MCRegister> RegList, MCRegister Reg) isArgumentRegister() argument
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| /llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMELFStreamer.cpp | 167 emitRegSave(const SmallVectorImpl<unsigned> & RegList,bool isVector) emitRegSave() argument
771 emitRegSave(const SmallVectorImpl<unsigned> & RegList,bool isVector) emitRegSave() argument
1395 collectHWRegs(const MCRegisterInfo & MRI,unsigned Idx,const SmallVectorImpl<unsigned> & RegList,bool IsVector,uint32_t & Mask_) collectHWRegs() argument
1417 emitRegSave(const SmallVectorImpl<unsigned> & RegList,bool IsVector) emitRegSave() argument
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| H A D | ARMTargetStreamer.cpp | 99 void ARMTargetStreamer::emitRegSave(const SmallVectorImpl<MCRegister> &RegList, in emitRegSave() argument
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| /llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2633 const SmallVectorImpl<unsigned> &RegList = getRegList(); addRegListOperands() local
2640 const SmallVectorImpl<unsigned> &RegList = getRegList(); addRegListWithAPSROperands() local
4106 const SmallVectorImpl<unsigned> &RegList = getRegList(); print() local
7725 auto &RegList = Op.getRegList(); validateInstruction() local
8401 auto &RegList = Op.getRegList(); validateInstruction() local
8907 auto &RegList = Op.getRegList(); processInstruction() local
12523 const SmallVectorImpl<unsigned> &RegList = Op.getRegList(); parseDirectiveSEHSaveRegs() local
12565 const SmallVectorImpl<unsigned> &RegList = Op.getRegList(); parseDirectiveSEHSaveFRegs() local
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| /llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 469 ArrayRef<MCPhysReg> RegList; AnalyzeArguments() local
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| /llvm-project/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 191 RegListOp RegList; member
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| /llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 61 static const MCPhysReg RegList[] = { in CC_Sparc_Assign_Split_64() local
87 static const MCPhysReg RegList[] = { in CC_Sparc_Assign_Ret_Split_64() local
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| /llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 894 struct RegListOp RegList; global() member
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