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Searched defs:BaseOpc (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp234 int getMTBUFOpcode(unsigned BaseOpc, unsigned Elements) { in getMTBUFOpcode()
264 int getMUBUFOpcode(unsigned BaseOpc, unsigned Elements) { in getMUBUFOpcode()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp881 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(N->getOpcode()); in ScalarizeVecOp_VECREDUCE_SEQ() local
5072 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(Opc); in WidenVecOp_VECREDUCE() local
5098 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(Opc); in WidenVecOp_VECREDUCE_SEQ() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FastISel.cpp2880 unsigned BaseOpc, CondCode; in fastLowerIntrinsicCall() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp701 int BaseOpc = isThumb2 ? (BaseKill && Base == ARM::SP ? ARM::t2ADDspImm in CreateLoadStoreMulti() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp2995 unsigned BaseOpc = BO.first.getOpcode(); in LowerUnalignedLoad() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp3563 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(Op.getOpcode()); in lowerVECREDUCE() local