Lines Matching defs:IntA

276   /// other than BValNo val# that can reach uses of AValno val# of IntA.
277   bool hasOtherReachingDefs(LiveInterval &IntA, LiveInterval &IntB,
617   LiveInterval &IntA =
623   // We have a non-trivially-coalescable copy with IntA being the source and
625   // source value number (in IntA) is defined by a copy from B, see if we can
652   LiveInterval::iterator AS = IntA.FindSegmentContaining(CopyUseIdx);
654   if (AS == IntA.end())
734   CopyMI->substituteRegister(IntA.reg(), IntB.reg(), 0, *TRI);
739     for (LiveInterval::SubRange &S : IntA.subranges()) {
748     shrinkToUses(&IntA);
754 bool RegisterCoalescer::hasOtherReachingDefs(LiveInterval &IntA,
759   if (LIS->hasPHIKill(IntA, AValNo))
762   for (LiveRange::Segment &ASeg : IntA.segments) {
811   LiveInterval &IntA =
816   // We found a non-trivially-coalescable copy with IntA being the source and
818   // source value number (in IntA) is defined by a commutable instruction and
843   VNInfo *AValNo = IntA.getVNInfoAt(CopyIdx.getRegSlot(true));
854   int DefIdx = DefMI->findRegisterDefOperandIdx(IntA.reg(), /*TRI=*/nullptr);
880   if (hasOtherReachingDefs(IntA, IntB, AValNo, BValNo))
883   // If some of the uses of IntA.reg is already coalesced away, return false.
885   for (MachineOperand &MO : MRI->use_nodbg_operands(IntA.reg())) {
889     LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx);
890     if (US == IntA.end() || US->valno != AValNo)
907   if (IntA.reg().isVirtual() && IntB.reg().isVirtual() &&
908       !MRI->constrainRegClass(IntB.reg(), MRI->getRegClass(IntA.reg())))
926   // Update uses of IntA of the specific Val# with IntB.
928        llvm::make_early_inc_range(MRI->use_operands(IntA.reg()))) {
939     LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx);
940     assert(US != IntA.end() && "Use must be live");
978   // Extend BValNo by merging in IntA live segments of AValNo. Val# definition
982   if (IntA.hasSubRanges() || IntB.hasSubRanges()) {
983     if (!IntA.hasSubRanges()) {
984       LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntA.reg());
985       IntA.createSubRangeFrom(Allocator, Mask, IntA);
993     for (LiveInterval::SubRange &SA : IntA.subranges()) {
1019     // Go over all subranges of IntB that have not been covered by IntA,
1021     // IntA has undef lanes that are defined in IntB.
1032   auto P = addSegmentsWithValNo(IntB, BValNo, IntA, AValNo);
1036   LIS->removeVRegDefAt(IntA, AValNo->def);
1038   LLVM_DEBUG(dbgs() << "\t\ttrimmed:  " << IntA << '\n');
1105   LiveInterval &IntA =
1112   VNInfo *AValNo = IntA.getVNInfoAt(CopyIdx);
1126     VNInfo *PVal = IntA.getVNInfoBefore(LIS->getMBBEndIdx(Pred));
1133     if (DefMI->getOperand(0).getReg() != IntA.reg() ||
1163   // reverse copy, CopyMI can be removed trivially if only IntA/IntB is updated.
1165   // update IntA/IntB.
1192                                   .addReg(IntA.reg());
1268   // Finally, update the live-range of IntA.
1269   shrinkToUses(&IntA);