Lines Matching defs:MBB
67 void ReachingDefAnalysis::enterBasicBlock(MachineBasicBlock *MBB) {
68 unsigned MBBNumber = MBB->getNumber();
76 // Set up LiveRegs to represent registers entering MBB.
82 if (MBB->pred_empty()) {
83 for (const auto &LI : MBB->liveins()) {
94 LLVM_DEBUG(dbgs() << printMBBReference(*MBB) << ": entry\n");
99 for (MachineBasicBlock *pred : MBB->predecessors()) {
119 void ReachingDefAnalysis::leaveBasicBlock(MachineBasicBlock *MBB) {
121 unsigned MBBNumber = MBB->getNumber();
124 // Save register clearances at end of MBB - used by enterBasicBlock().
179 void ReachingDefAnalysis::reprocessBasicBlock(MachineBasicBlock *MBB) {
180 unsigned MBBNumber = MBB->getNumber();
186 instructionsWithoutDebug(MBB->instr_begin(), MBB->instr_end());
191 for (MachineBasicBlock *pred : MBB->predecessors()) {
226 MachineBasicBlock *MBB = TraversedMBB.MBB;
227 LLVM_DEBUG(dbgs() << printMBBReference(*MBB)
232 // Reprocess MBB that is part of a loop.
233 reprocessBasicBlock(MBB);
237 enterBasicBlock(MBB);
239 instructionsWithoutDebug(MBB->instr_begin(), MBB->instr_end()))
241 leaveBasicBlock(MBB);
249 for (MachineBasicBlock &MBB : MF) {
250 for (MachineInstr &MI : MBB) {
389 MachineInstr *ReachingDefAnalysis::getInstFromId(MachineBasicBlock *MBB,
391 assert(static_cast<size_t>(MBB->getNumber()) <
394 assert(InstId < static_cast<int>(MBB->size()) &&
400 for (auto &MI : *MBB) {
421 MachineBasicBlock *MBB = Def->getParent();
423 while (++MI != MBB->end()) {
443 bool ReachingDefAnalysis::getLiveInUses(MachineBasicBlock *MBB, Register Reg,
446 instructionsWithoutDebug(MBB->instr_begin(), MBB->instr_end())) {
455 auto Last = MBB->getLastNonDebugInstr();
456 if (Last == MBB->end())
463 MachineBasicBlock *MBB = MI->getParent();
473 SmallVector<MachineBasicBlock *, 4> ToVisit(MBB->successors());
476 MachineBasicBlock *MBB = ToVisit.pop_back_val();
477 if (Visited.count(MBB) || !MBB->isLiveIn(Reg))
479 if (getLiveInUses(MBB, Reg, Uses))
480 llvm::append_range(ToVisit, MBB->successors());
481 Visited.insert(MBB);
493 for (auto *MBB : MI->getParent()->predecessors())
494 getLiveOuts(MBB, Reg, Defs);
497 void ReachingDefAnalysis::getLiveOuts(MachineBasicBlock *MBB, Register Reg,
500 getLiveOuts(MBB, Reg, Defs, VisitedBBs);
503 void ReachingDefAnalysis::getLiveOuts(MachineBasicBlock *MBB, Register Reg,
506 if (VisitedBBs.count(MBB))
509 VisitedBBs.insert(MBB);
511 LiveRegs.addLiveOuts(*MBB);
515 if (auto *Def = getLocalLiveOutMIDef(MBB, Reg))
518 for (auto *Pred : MBB->predecessors())
555 MachineBasicBlock *MBB = MI->getParent();
557 LiveRegs.addLiveOuts(*MBB);
566 instructionsWithoutDebug(MBB->instr_rbegin(), MBB->instr_rend())) {
576 MachineBasicBlock *MBB = MI->getParent();
577 auto Last = MBB->getLastNonDebugInstr();
578 if (Last != MBB->end() &&
582 if (auto *Def = getLocalLiveOutMIDef(MBB, Reg))
590 MachineBasicBlock *MBB = MI->getParent();
592 LiveRegs.addLiveOuts(*MBB);
596 auto Last = MBB->getLastNonDebugInstr();
598 if (Last != MBB->end() && getReachingDef(&*Last, Reg) != Def)
609 MachineInstr *ReachingDefAnalysis::getLocalLiveOutMIDef(MachineBasicBlock *MBB,
612 LiveRegs.addLiveOuts(*MBB);
616 auto Last = MBB->getLastNonDebugInstr();
617 if (Last == MBB->end())
632 return Def < 0 ? nullptr : getInstFromId(MBB, Def);
789 MachineBasicBlock *MBB = MI->getParent();
793 for (auto E = MBB->end(); I != E; ++I) {