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35defdf4 |
| 29-Jan-2025 |
Michael Maitland <michaeltmaitland@gmail.com> |
Revert "[ReachingDefAnalysis][NFC] Use at instead of lookup for DenseMap access"
This reverts commit 3ce97e4aa98ad6a3502528818ff11eee89ef2fae. Pushed to main prematurley.
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3ce97e4a |
| 29-Jan-2025 |
Michael Maitland <michaeltmaitland@gmail.com> |
[ReachingDefAnalysis][NFC] Use at instead of lookup for DenseMap access
`at` has an assert that the key exists. Since we are assuming the key exists, use `at` instead of `lookup`.
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#
3c3c850a |
| 29-Jan-2025 |
Mikhail Gudim <mgudim@gmail.com> |
[ReachingDefAnalysis] Extend the analysis to stack objects. (#118097)
We track definitions of stack objects, the implementation is identical
to tracking of registers.
Also, added printing of all
[ReachingDefAnalysis] Extend the analysis to stack objects. (#118097)
We track definitions of stack objects, the implementation is identical
to tracking of registers.
Also, added printing of all found reaching definitions for testing
purposes.
---------
Co-authored-by: Michael Maitland <michaeltmaitland@gmail.com>
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Revision tags: llvmorg-21-init |
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5cde6d2f |
| 21-Jan-2025 |
Mikhail Gudim <mgudim@gmail.com> |
[ReachingDefAnalysis][NFC] Replace MCRegister with Register (#123626)
This is preparation for extending ReachingDefAnalysis to stack slots. We
should use `Register`, not `MCRegister` for something
[ReachingDefAnalysis][NFC] Replace MCRegister with Register (#123626)
This is preparation for extending ReachingDefAnalysis to stack slots. We
should use `Register`, not `MCRegister` for something that can be a
physical register or a stack slot.
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Revision tags: llvmorg-19.1.7 |
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#
f37bee1d |
| 08-Jan-2025 |
Mikhail Gudim <mgudim@gmail.com> |
[ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (#122112)
This is in order to prepare for future MR where we will extend
`ReachingDefAnalysis` to stack slots.
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Revision tags: llvmorg-19.1.6 |
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9ea499a5 |
| 10-Dec-2024 |
Mikhail Gudim <mgudim@gmail.com> |
[ReachingDefAnalysis] Fix typo. (#119329)
"reaching-deps-analysis" -> "reaching-defs-analysis".
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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1 |
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#
64f2bff1 |
| 30-Sep-2024 |
Kazu Hirata <kazu@google.com> |
[ReachingDefAnalysis] Turn MBBReachingDefsInfo into a proper class (NFC) (#110432)
I'm trying to speed up the reaching def analysis by changing the
underlying data structure. Turning MBBReachingDe
[ReachingDefAnalysis] Turn MBBReachingDefsInfo into a proper class (NFC) (#110432)
I'm trying to speed up the reaching def analysis by changing the
underlying data structure. Turning MBBReachingDefsInfo into a proper
class decouples the data structure and its users. This patch does not
change the existing three-dimensional vector structure.
---------
Co-authored-by: Nikita Popov <github@npopov.com>
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Revision tags: llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2 |
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#
7c21495f |
| 08-Mar-2024 |
AtariDreams <83477269+AtariDreams@users.noreply.github.com> |
Reapply "Convert many LivePhysRegs uses to LiveRegUnits" (#84338)
This only converts the instances where all that is needed is to change
the variable type name.
Basically, anything that involves
Reapply "Convert many LivePhysRegs uses to LiveRegUnits" (#84338)
This only converts the instances where all that is needed is to change
the variable type name.
Basically, anything that involves a function that LiveRegUnits does not
directly have was skipped to play it safe.
Reverts
https://github.com/llvm/llvm-project/commit/7a0e222a17058a311b69153d0b6f1b4459414778
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Revision tags: llvmorg-18.1.1 |
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7a0e222a |
| 07-Mar-2024 |
Jay Foad <jay.foad@amd.com> |
Revert "Convert many LivePhysRegs uses to LiveRegUnits (#83905)"
This reverts commit 2a13422b8bcee449405e3ebff957b4020805f91c.
It was causing test failures on the expensive check builders.
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2a13422b |
| 06-Mar-2024 |
AtariDreams <83477269+AtariDreams@users.noreply.github.com> |
Convert many LivePhysRegs uses to LiveRegUnits (#83905)
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Revision tags: llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4 |
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#
111fcb0d |
| 02-Sep-2023 |
Fangrui Song <i@maskray.me> |
[llvm] Fix duplicate word typos. NFC
Those fixes were taken from https://reviews.llvm.org/D137338
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Revision tags: llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5 |
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#
aa2d0fbc |
| 21-May-2023 |
Sergei Barannikov <barannikov88@gmail.com> |
[MC] Add MCRegisterInfo::regunits for iteration over register units
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D152098
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Revision tags: llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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#
9e6d1f4b |
| 17-Jul-2022 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Qualify auto variables in for loops (NFC)
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Revision tags: llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2 |
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#
1de11fe3 |
| 26-Feb-2022 |
Benjamin Kramer <benny.kra@googlemail.com> |
Use RegisterInfo::regsOverlaps instead of checking aliases
This is both less code and faster since it doesn't have to expand all the sub & superreg sets. NFCI.
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Revision tags: llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4 |
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#
84b07c9b |
| 19-Sep-2021 |
Kazu Hirata <kazu@google.com> |
[llvm] Use pop_back_val (NFC)
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Revision tags: llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2 |
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#
eeddcba5 |
| 04-Aug-2021 |
David Green <david.green@arm.com> |
[RDA] Attempt to make RDA subreg aware
This attempts to make more of RDA aware of potentially overlapping subregisters. Some of this was already in place, with it iterating through MCRegUnitIterator
[RDA] Attempt to make RDA subreg aware
This attempts to make more of RDA aware of potentially overlapping subregisters. Some of this was already in place, with it iterating through MCRegUnitIterators. This also replaces calls to LiveRegs.contains(..) with !LiveRegs.available(..), and updates the isValidRegUseOf and isValidRegDefOf to search subregs.
Differential Revision: https://reviews.llvm.org/D107351
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Revision tags: llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1 |
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#
b3d38327 |
| 18-May-2021 |
David Green <david.green@arm.com> |
[RDA] Fix printing of regs / reg units. NFC
It was printing RegUnits as Regs, leading to much confusion in the debug logs.
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Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3 |
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#
d6391209 |
| 28-Feb-2021 |
Kazu Hirata <kazu@google.com> |
[llvm] Use set_is_subset (NFC)
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Revision tags: llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1 |
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#
7bc76fd0 |
| 31-Dec-2020 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Construct SmallVector with iterator ranges (NFC)
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#
1e3ed091 |
| 29-Dec-2020 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Use llvm::append_range (NFC)
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Revision tags: llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1 |
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#
e24537d4 |
| 21-Oct-2020 |
Mircea Trofin <mtrofin@google.com> |
[NFC][MC] Use MCRegister for ReachingDefAnalysis APIs
Also updated the users of the APIs; and a drive-by small change to RDFRegister.cpp
Differential Revision: https://reviews.llvm.org/D89912
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#
cb27006a |
| 10-Oct-2020 |
David Green <david.green@arm.com> |
[ARM] Attempt to make Tail predication / RDA more resilient to empty blocks
There are a number of places in RDA where we assume the block will not be empty. This isn't necessarily true for tail pred
[ARM] Attempt to make Tail predication / RDA more resilient to empty blocks
There are a number of places in RDA where we assume the block will not be empty. This isn't necessarily true for tail predicated loops where we have removed instructions. This attempt to make the pass more resilient to empty blocks, not casting pointers to machine instructions where they would be invalid.
The test contains a case that was previously failing, but recently been hidden on trunk. It contains an empty block to begin with to show a similar error.
Differential Revision: https://reviews.llvm.org/D88926
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Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5 |
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#
3f88c10a |
| 30-Sep-2020 |
Sam Parker <sam.parker@arm.com> |
[RDA] isSafeToDefRegAt: Look at global uses
We weren't looking at global uses of a value, so we could happily overwrite the register incorrectly.
Differential Revision: https://reviews.llvm.org/D88
[RDA] isSafeToDefRegAt: Look at global uses
We weren't looking at global uses of a value, so we could happily overwrite the register incorrectly.
Differential Revision: https://reviews.llvm.org/D88554
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#
779a8a02 |
| 30-Sep-2020 |
Sam Parker <sam.parker@arm.com> |
[ARM][LowOverheadLoops] TryRemove helper.
Make a helper function that wraps around RDA::isSafeToRemove and utilises the existing DCE IT block checks.
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#
700f93e9 |
| 28-Sep-2020 |
Sam Parker <sam.parker@arm.com> |
[RDA] Switch isSafeToMove iterators
So forwards is forwards and backwards is reverse. Also add a check so that we know the instructions are in the expected order.
Differential Revision: https://rev
[RDA] Switch isSafeToMove iterators
So forwards is forwards and backwards is reverse. Also add a check so that we know the instructions are in the expected order.
Differential Revision: https://reviews.llvm.org/D88419
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