History log of /openbsd-src/sys/arch/riscv64/dev/stfclock.c (Results 1 – 14 of 14)
Revision Date Author Comments
# e309ca49 17-Oct-2024 jsg <jsg@openbsd.org>

remove unneeded includes


# b28842ba 17-Feb-2024 kettenis <kettenis@openbsd.org>

Add JH7100 I2C clocks.

ok miod@, jsg@


# 009ac988 23-Sep-2023 kettenis <kettenis@openbsd.org>

Add stfrng(4), a driver for the random number generator on the JH7110 SoC.

ok joel@, jca@


# d1efa468 19-Sep-2023 kettenis <kettenis@openbsd.org>

Instead of adjusting PLL0 to scale the CPU frequency, use the divider
of the actual CPU clock. This prevents one of the GMAC0 clocks changing
when we change the CPU frequency, which would break one

Instead of adjusting PLL0 to scale the CPU frequency, use the divider
of the actual CPU clock. This prevents one of the GMAC0 clocks changing
when we change the CPU frequency, which would break one of the Ethernet
ports on the VisionFive 2 v1.2a.

However, since the firmware configures PLL0 to 1 GHz, we still need to
bump it up to 1.5 GHz in order to reach the highest supported CPU clock
rates.

ok jmatthew@, jca@, jsing@

show more ...


# 615e1349 30-Aug-2023 kettenis <kettenis@openbsd.org>

Implement a few more clocks related to the GMAC.

ok jsing@


# 5fdc23b6 01-Aug-2023 kettenis <kettenis@openbsd.org>

Add (limited) support for setting PPL0 on JH7110.

ok jsing@


# 6c7eb53a 30-Jul-2023 kettenis <kettenis@openbsd.org>

Add JH7110 I2C clocks.

ok jsing@


# 662594ac 07-Jul-2023 kettenis <kettenis@openbsd.org>

Add a few more JH7110 clocks.

ok jsing@


# a268c146 05-Jul-2023 kettenis <kettenis@openbsd.org>

Implement support for the GPIOs on the JH7110. Makes it possible to reboot
the VisionFive 2 from OpenBSD.

ok jsing@


# c332ccb1 04-Jul-2023 kettenis <kettenis@openbsd.org>

Add a bunch of clocks for GMAC0 and GMAC1 on the JH7110 SoC.
Based on an initial diff from jsing@

ok jsing@


# 9c8757ea 24-Jun-2023 jsing <jsing@openbsd.org>

Add initial support for StarFive VisionFive V2 to stfclock(4).

This adds initial support for the syscrg and pll clocks on the StarFive
VisionFive V2 JH7110 SoC.

ok kettenis@


# 683edca5 28-Dec-2022 kettenis <kettenis@openbsd.org>

Handle clock that can't be gated as a no-op.

ok patrick@


# 8aadf3ca 12-Jun-2022 kettenis <kettenis@openbsd.org>

Add stftemp(4), a driver for the temperature sensor integrated on the
StarFive JH7100 SoC.

ok jsg@


# fab98459 06-Jun-2022 kettenis <kettenis@openbsd.org>

Add stfclock(4), a driver for the clock controller found on the StarFive
JH7100 SoC.

ok jsg@