constify struct cfattach

implenent -> implement

Fix typo.

The TCE table needs to be aligned on a boundary that is a multiple of its
size. Fixes booting on machines that have memory banks higher up in
physical address space which needs a larger TCE table.

Make sure we perform address translation to all elements of a DMA mapping.

Implement a workaround for PCI devices that can't address the full 64-bit
PCI address space. Needed for radeondrm(4) and amdgpu(4) since Radeon GPUs
only implement 36, 40 or 44 bits of address space.

Prefer 32-bit MSI even if the hardware supports 64-bit MSI to work
around buggy Radeon cards that advertise 64-bit MSI but only implement
40 bits.

Correctly pass the "struct cpu_info" pointer along when establishing
interrupts. This fixes IPIs on machines with certain (newer?) OPAL
firmware. It also allows implementing pci_intr_establish_cpu(

Correctly pass the "struct cpu_info" pointer along when establishing
interrupts. This fixes IPIs on machines with certain (newer?) OPAL
firmware. It also allows implementing pci_intr_establish_cpu(9), which
is needed for distributing interrupt handlers across CPUs.

tested by gkoehler@

show more ...

Implement address translation for bus_space_mmap(9).

Store the device tree node in the pcitag_t.

Attempt to support IODA2 bridges such as the one found on POWER8 chips.
These lack an "ibm,opal-available-m64-ranges" property, but it seems
we can assume a 0-15 range. At least this is what Linux d

Attempt to support IODA2 bridges such as the one found on POWER8 chips.
These lack an "ibm,opal-available-m64-ranges" property, but it seems
we can assume a 0-15 range. At least this is what Linux does.

show more ...

Make INTx interupts work.

We need to set the bypass bit for "raw" DMA memory as well.

Use the right bus space tag when enabling MSI-X interrupts. Makes them
actually work.

avoid uninitialised pointer use

found with scan-build, ok kettenis@

Provide address space extents. While the firmware does configure the bridge
windows it doesn't enable the bus master bit in the command register.
This prevents DMA from working. By providing the add

Provide address space extents. While the firmware does configure the bridge
windows it doesn't enable the bus master bit in the command register.
This prevents DMA from working. By providing the address space extents
ppb(4) will automatically configure the bridge and set the bit.

show more ...

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Allocate MSIs from the range provided by the device tree and bind them
to a PE.

A bit of MSI support code; we need to distinguish between 32-bit and 64-bit
MSIs on powerpc64.

Set up 64-bit mmio windows and enable DMA bypass mode.

Do the approprate address remapping and install bus_space(9) functions
that do the necessary byte swapping for a little-endian bus.

Probe the PCI bus.