Remove unused guarded read and write routines.

No objection from miod@

Make trapDump() take the printf-like function as a 2nd parameter.
No functional change; helps non-released kernels with extra debugging code (-:

Handle the coprocessor 0 cause and status registers as a 64 bit value now,
as some odd mips designs need moro than 32 bits in there. This causes a lot
of mechanical changes everywhere getsr() is used.

Add a few more coprocessor 0 cause and config registers defines.

Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.

Discussed and okay drahn@. Okay deraadt@.

Make trapdebug code MP-safe.

typo

Completely overhaul interrupt handling on sgi. Cpu state now only stores a
logical IPL level, and per-platform (IP27/IP30/IP32) code will from the
necessary hardware mask registers.

This allows the

Completely overhaul interrupt handling on sgi. Cpu state now only stores a
logical IPL level, and per-platform (IP27/IP30/IP32) code will from the
necessary hardware mask registers.

This allows the use of more than one interrupt mask register. Also, the
generic (platform independent) interrupt code shrinks a lot, and the actual
interrupt handler chains and masking information is now per-platform private
data.

Interrupt dispatching is generated from a template; more routines will be
added to the template to reduce platform-specific changes and share as much
code as possible.

Tested on IP27, IP30, IP32 and IP35.

show more ...

Add ``guarded'' word read and write routines, to be used by machine-dependent
code soon. Similar to what ddb does, but does not need ddb to be compiled in.

Remove unused badaddr().

Define R5k/R10k extra trap codes.

Remove advertising clause from UCB licenses; ok deraad@

Un-__P.

ok pefo@

trapdebug_enter() really takes 2 args, not 1.

ok pefo@ miod@

spacing

Various fixes and cleanups from miod@, tested and OK.

initial mips64