Introduce qwz(4), a work-in-progress port of the Linux ath12k driver.

This driver is not working yet, it's a copy of qwx(4) which bit-by-bit will be
adjusted to work on the newer generation of chips

Introduce qwz(4), a work-in-progress port of the Linux ath12k driver.

This driver is not working yet, it's a copy of qwx(4) which bit-by-bit will be
adjusted to work on the newer generation of chips. Even though this is only a
minor bump over the previous generation, the changes are large enough that
bringup, debugging and long-term maintenance would suffer trying to squash them
into a single driver. This can be reconsidered once we have reached a stable
state.

show more ...

Add ufshci(4) at fdt support.

This lets me boot the Samsung Galaxy Book4 Edge in DT mode with ufshci(4),
based on a WIP DTB file.

ok kettenis@

Make the Samsung Galaxy Book4 Edge (x1e80100) boot in ACPI mode;
Until now the kernel did panic during early boot because we couldn't
respond to the battery requests sent to the 0xa1 "bus". This (du

Make the Samsung Galaxy Book4 Edge (x1e80100) boot in ACPI mode;
Until now the kernel did panic during early boot because we couldn't
respond to the battery requests sent to the 0xa1 "bus". This (dummy)
driver registers a 0xa1 region space very early, and responds with a
static zero value to satisfy the battery requests on 0xa1, which let us
boot successfully to multi-user.

In the future this machine should be operated in FDT mode, and an improved
AML parsing interface might make this workaround obsolete also for RAMDISK.

Help and OK kettenis@, deraadt@

show more ...

Add rpigpio(4), a driver for the RP1 GPIO controller on the Raspberry Pi 5.

With this, GPIOs can be correctly configured and engaged. Complete pinctrl
as well as IRQ functionality is yet to be impl

Add rpigpio(4), a driver for the RP1 GPIO controller on the Raspberry Pi 5.

With this, GPIOs can be correctly configured and engaged. Complete pinctrl
as well as IRQ functionality is yet to be implemented.

ok kettenis@

show more ...

Enable cad(4).

ok kettenis@

Enable rkspi(4) and rkpmic(4) at spi.

ok patrick@

qwx(4) works well enough to enable
ok stsp

Introduce qwx(4), a work-in-progress port of the Linux ath11k driver.

This driver is not working yet. Scanning almost works but a lot more
work remains to be done. So far most of the porting work wa

Introduce qwx(4), a work-in-progress port of the Linux ath11k driver.

This driver is not working yet. Scanning almost works but a lot more
work remains to be done. So far most of the porting work was done by
myself, with some help from mpi, patrick, and kettenis.

Obviously this driver remains disabled for now. Enable relevant lines
in the kernel config if you want to help out with development.

At present firmware files must be obtained manually and placed
in the directory /etc/firmware/qwx/WCN6855/hw2.1/
This will be improved later.

Thanks to the OpenBSD Foundation for supporting this effort.

show more ...

enable UDF on arm64 install media
ok deraadt@ kn@

Enable CD9660 in RAMDISK so we can mount CD-ROMs.

ok jsg@

Add qcsdam(4), a driver for the PMIC Shared Direct Access Memory found on
Qualcomm SoCs.

ok kettenis@

Use "early 2" to attach aplpngr(4) to make sure it attaches before other
core drivers that need to enable power domains.

ok drahn@, deraadt@

Add qctsens(4), a driver for the Temperature Sensor found on Qualcomm SoCs.

The driver not only provides the temperature readings for the cores, cluster
and memory in hw.sensors, but also allows the

Add qctsens(4), a driver for the Temperature Sensor found on Qualcomm SoCs.

The driver not only provides the temperature readings for the cores, cluster
and memory in hw.sensors, but also allows the thermal zone code to act on
temperature changes.

ok drahn@

show more ...

Add qcpas(4), a driver for the Peripheral Authentication Service found on
Qualcomm SoCs.

The immediate task for this driver is to provide firmware to the auxiliary
cores and to bring them up. This

Add qcpas(4), a driver for the Peripheral Authentication Service found on
Qualcomm SoCs.

The immediate task for this driver is to provide firmware to the auxiliary
cores and to bring them up. This is accomplished by parsing the ELF files
and providing the data in certain memory regions, and telling qcscm(4) to
check and execute the firmware on the auxiliary cores.

With the cores up we can now talk to the firmware. The glink-edge subnode
indicates that we can talk to it using the GLINK protocol over shared memory
provided by qcsmem(4). This interface is essentially a channel multiplexer,
with each channel identified through an ASCII string.

One of those channels connects to a PMIC router, which allows us to talk to
the battery manager service that contains information about the charging and
battery states.

ok drahn@ kettenis@

show more ...

Add qcaoss(4), a driver for the Always On Subsystem found on Qualcomm SoCs.

This subsystem typically provides an interface for clocks and regulators
not controlled via RPMH. We will use it to switc

Add qcaoss(4), a driver for the Always On Subsystem found on Qualcomm SoCs.

This subsystem typically provides an interface for clocks and regulators
not controlled via RPMH. We will use it to switch the load state of the
ADSP co-processor. Surprisingly, or maybe not, the interface uses ASCII
text that kind of looks like JSON.

ok kettenis@

show more ...

Add qcsmptp(4), a driver to share 32-bit values between (co-)processors.

The inbound path is typically used as interrupt controller, e.g. to handle
handover and ready interrupts when a remoteproc bo

Add qcsmptp(4), a driver to share 32-bit values between (co-)processors.

The inbound path is typically used as interrupt controller, e.g. to handle
handover and ready interrupts when a remoteproc boots. The outbound path
seems to be used to stop cores, but we don't do that yet.

ok kettenis@

show more ...

Add qcsmem(4), a driver for the shared memory table on Qualcomm SoCs
used to establish data communication channels with co-processors.

ok kettenis@ drahn@

Add qcmtx(4), a driver for the hardware spinlock on Qualcomm SoCs that
is used to synchronize access to the shared memory table between the
application cores we run on and the co-processors next to u

Add qcmtx(4), a driver for the hardware spinlock on Qualcomm SoCs that
is used to synchronize access to the shared memory table between the
application cores we run on and the co-processors next to us.

ok kettenis@ drahn@

show more ...

Add qcipcc(4), a driver for the inter-processor mailbox interface used
to inform (and get informed) of changes to shared memory state.

ok kettenis@

add axppmic support to RAMDISK,
to support ethernet on OrangePi One Plus (Allwinner H6).

ok kettenis@

Add a driver for the Qualcomm rng device found on the Thinkpad X13s, based on
kettenis's amlrng driver.

suggestions and OK patrick@

add viogpu, a VirtIO GPU driver

works enough to get a console on qemu with more work to come from
others

feedback from miod
ok patrick

enable dwmshc to support the emmc controller on rockchip rk356x boards.

enable rkusbphy(4)

Enable rkiovd(4)