For struct timecounter, use C99 initializers.
Compile tested. No functional changes intended.

Change to a tab from white-spaces.

Support Armada 370. tested on MiraBox.

Initialize mvsoctmr_freq earlier (in mvsoctmr_attach) to avoid division
by zero in calculation of the watchdog parameters.

Remove TMR_FLAGS_ARMADAXP and Add flags NOBRIDGE, 25MHZ, SYSCLK.
- NOBRIDGE does not go via a bridge.
- 25MHZ is always counted with the cycle of 25 MHz.
- SYSCLK is counted with the cycle of s

Remove TMR_FLAGS_ARMADAXP and Add flags NOBRIDGE, 25MHZ, SYSCLK.
- NOBRIDGE does not go via a bridge.
- 25MHZ is always counted with the cycle of 25 MHz.
- SYSCLK is counted with the cycle of sysClk. This is used in a few days
for Armada 370.
And please use not mvTclk but variable mvsoctmr_freq for calculation of a clock.
(e.g. in delay())

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Remove some #ifdef ARMADAXP. We can enable simultaneously both ARMADAXP and
other SoC options.

Add support for timers on Armada XP.

Obtained from Marvell, Semihalf.

Actually, the WDT-expired bit in the ICR needs to be cleared before enabling
watchdog reset.

The maximum watchdog period is dependant on mvTclk; calculate at runtime.
This gets the maximum period up to 25 seconds at 166⅔MHz mvTclk.

Remove duplicate global variable.

When disabling watchdog timer, do not set the counter to 0.
Having the watchdog counter at 0 and having WDRstOutEn set to 1 causes
immediate watchdog reset on my 88F5182 A2.

Add support for the watchdog timer in mvsoctmr.
Tested on DreamPlug system.

Change old-style function defintions to C89 prototypes.

Approved by releng.

Rework mvsoctmr(4), improving timekeeping accuracy

Inconveniently the Marvell hardware only counts down.
We need to reverse this for timecounter(9), and we need
to do it in a very lightweight way.

Rework mvsoctmr(4), improving timekeeping accuracy

Inconveniently the Marvell hardware only counts down.
We need to reverse this for timecounter(9), and we need
to do it in a very lightweight way.

- use Timer0 for the clock interrupt
- use Timer1 for timecounter(9) and delay(9)
- drop statclock due to lack of timers (does anyone actually use this?)

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Add support Marvell Sheeva Core and SoC. (Orion/Kirkwood)
Discovery Innovation not yet.