| #
ee1c6cfc |
| 24-Jul-2016 |
maxv <maxv@NetBSD.org> |
KNF, and reduce the diff between amd64 and i386.
|
| #
7ef87bcc |
| 15-Jan-2014 |
joerg <joerg@NetBSD.org> |
LLVM doesn't support data32/addr32, but is smart enough to figure the
necessary prefixes out.
|
| #
b053fe26 |
| 19-Apr-2012 |
jym <jym@NetBSD.org> |
Set the CR0_AM bit so processes can enable alignment check errors under
x86 through PSL_AC bit.
ATF test incoming shortly.
|
| #
dd324f84 |
| 24-Aug-2009 |
jmcneill <jmcneill@NetBSD.org> |
Add definition for WAKEUP_vesa_modenum
|
| #
e1f40929 |
| 24-Aug-2009 |
jmcneill <jmcneill@NetBSD.org> |
Ensure that the VBE mode is only restored when machdep.acpi_vbios_reset=1
|
| #
b585cf85 |
| 24-Aug-2009 |
jmcneill <jmcneill@NetBSD.org> |
Pass the VBE mode number from the bootloader to the kernel, and then
make the ACPI wakecode aware of it. Restore the desired VBE mode on resume
when acpi_vbios_reset=1, so suspend/resume with genfb c
Pass the VBE mode number from the bootloader to the kernel, and then
make the ACPI wakecode aware of it. Restore the desired VBE mode on resume
when acpi_vbios_reset=1, so suspend/resume with genfb console will work.
show more ...
|
| #
ae85e6b9 |
| 25-May-2008 |
joerg <joerg@NetBSD.org> |
Random underdocumented CPU facts:
AMD K8 and newer will trap when enabling the NX support outside PAE
paging mode. The AMD64 wake code was restoring the MSR EFER to switch to
Long Mode and naturally
Random underdocumented CPU facts:
AMD K8 and newer will trap when enabling the NX support outside PAE
paging mode. The AMD64 wake code was restoring the MSR EFER to switch to
Long Mode and naturally didn't have paging enabled at that point.
While this works fine with Intel CPUs, it resulted in an immediate
reboot with AMD processors.
Fixed by a joint brain storming session of jmcneill@, cegger@ and
myself, based on some input from the hardware developers. This fixes
PR 38587.
show more ...
|
| #
43af10dd |
| 25-May-2008 |
jmcneill <jmcneill@NetBSD.org> |
Remove unnecessary rdmsr when modifying MSR_EFER.
|
| #
f674d967 |
| 11-May-2008 |
ad <ad@NetBSD.org> |
Share cpu.h between the x86 ports.
|
| #
ce099b40 |
| 28-Apr-2008 |
martin <martin@NetBSD.org> |
Remove clause 3 and 4 from TNF licenses
|
| #
870cffb0 |
| 18-Dec-2007 |
joerg <joerg@NetBSD.org> |
Add new IPI for saving CPU state explicitly, share high-level part of
ACPI wakeup code and teach it how to start the APs again. As a side
effect the CPU_START interface allows choosing between differ
Add new IPI for saving CPU state explicitly, share high-level part of
ACPI wakeup code and teach it how to start the APs again. As a side
effect the CPU_START interface allows choosing between different
bootstrap codes more easily now.
show more ...
|
| #
4c1d81b2 |
| 09-Dec-2007 |
jmcneill <jmcneill@NetBSD.org> |
Merge jmcneill-pm branch.
|