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eee38be7 |
| 08-Jul-2011 |
matt <matt@NetBSD.org> |
Major update of algor. Now uses generic mips bus_space.h bus_dma.h isa_machdep.h pci_machdep.h Now uses evbmips versions of cpu.c isadma_bounce.c mcclock_isa.c
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10db401f |
| 06-Apr-2011 |
dyoung <dyoung@NetBSD.org> |
Fix fallout from pci_attach_args constification.
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cb468f2e |
| 16-Feb-2006 |
thorpej <thorpej@NetBSD.org> |
Remove the ugly algor_get_ethaddr() hack. We have a properties infrastructure now, so use that to provide the Ethernet address of the built-in Ethernet. XXX Still a little ugly in the tlp driver, bu
Remove the ugly algor_get_ethaddr() hack. We have a properties infrastructure now, so use that to provide the Ethernet address of the built-in Ethernet. XXX Still a little ugly in the tlp driver, but fixing that would require XXX reworking the SROM usage in a broader sense.
While here, do the P4032 DMA window hack in device_register() as well.
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95e1ffb1 |
| 11-Dec-2005 |
christos <christos@NetBSD.org> |
merge ktrace-lwp.
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a5a5473c |
| 29-Jul-2004 |
drochner <drochner@NetBSD.org> |
remove now unnecessary "pci_enumerate_bus" definitions
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dada8613 |
| 15-May-2002 |
thorpej <thorpej@NetBSD.org> |
Let machine-dependent code specify how to enumerate the bus. Currently, everyone uses pci_enumerate_bus_generic().
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6fd8d278 |
| 29-Oct-2001 |
thorpej <thorpej@NetBSD.org> |
pci_conf_interrupt() takes bus/dev/pin, not bus/dev/func.
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e5bd00e4 |
| 08-Jun-2001 |
simonb <simonb@NetBSD.org> |
For ports that wire up pciide in compatibility mode, have them define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH in pci_machdep.h and pciide_map_compat_intr() only calls pciide_machdep_compat_intr_e
For ports that wire up pciide in compatibility mode, have them define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH in pci_machdep.h and pciide_map_compat_intr() only calls pciide_machdep_compat_intr_establish() if that preprocessor define exists.
Ports that don't need to do this no longer need to supply a dummy function.
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16b9c606 |
| 28-May-2001 |
thorpej <thorpej@NetBSD.org> |
A port to the Algorithmics MIPS evaluation boards. We currently support the P-5064, which has a QED RM5xxx CPU soldered on.
There is some skeletal support for the P-4032 (an older board, which had
A port to the Algorithmics MIPS evaluation boards. We currently support the P-5064, which has a QED RM5xxx CPU soldered on.
There is some skeletal support for the P-4032 (an older board, which had an R4xxx CPU). There are some placeholders for the P-6032, which is their newest board, but no real code yet (the P-6032 has a different PCI controller, the Algorithmics BONITO).
There are still some (apprently softintr-related) problems with the algor kernel, but it works well-enough to self-host.
Kudos to Allegro Networks for loaning me a P-5064 board on which to do the port.
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