Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5 |
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b3363104 |
| 23-Nov-2024 |
Sergei Barannikov <barannikov88@gmail.com> |
[UTC] Add support for Xtensa (#117441)
Regenerate the failing test as well.
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Revision tags: llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3 |
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d38bae3c |
| 09-Aug-2024 |
Juan Manuel Martinez Caamaño <juamarti@amd.com> |
[update_llc_test_checks][AMDGPU] Update AMDGPU regexp in update_llc_test_checks.py (#102480)
Updating `llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll` with
`update_llc_test_checks.py` ended
[update_llc_test_checks][AMDGPU] Update AMDGPU regexp in update_llc_test_checks.py (#102480)
Updating `llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll` with
`update_llc_test_checks.py` ended with several kernels with no checks.
Llc's output contained the line ".amdgpu_hsa_kernel <funcname>" after
the ".type <funcname>,@function" entry which was not considered by the
regexp.
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Revision tags: llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7 |
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e325e2e5 |
| 04-Jun-2024 |
Jon Roelofs <jonathan_roelofs@apple.com> |
update_test_checks: drop the other arm64_32 handlers
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4ee950e7 |
| 03-Jun-2024 |
Jon Roelofs <jonathan_roelofs@apple.com> |
update_test_checks: support more arm64_32-apple-watchos triples
Having the version in `get_run_handlers` meant that a RUN line without the version in it would not match, and therefore UTC would gene
update_test_checks: support more arm64_32-apple-watchos triples
Having the version in `get_run_handlers` meant that a RUN line without the version in it would not match, and therefore UTC would generate a useless catch-all check of the form:
``` ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: ; CHECK: {{.*}} ```
This patch also adds `arm64_32` as a base-level run handler, and assumes it will always apply to a darwin target (which is currently the case for all arm64_32-* triples I see in tree currently).
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34388f98 |
| 27-May-2024 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
update_llc_test_checks: better support for non-llc tools (#93135)
A full downstream fork can already hack up update_llc_test_checks.py to
support custom tools that output assembly.
An out-of-tre
update_llc_test_checks: better support for non-llc tools (#93135)
A full downstream fork can already hack up update_llc_test_checks.py to
support custom tools that output assembly.
An out-of-tree frontend which is meant to build against upstream
llvm-project cannot do this, and so providing additional arguments to
support a non-standard tool is useful.
This also makes a minor adjustment to the regular expression for
matching AMDGPU functions when fewer comments are enabled, which happens
to be the case for our out-of-tree shader compiler (which motivated this
change).
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597ac471 |
| 18-May-2024 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
update_test_checks: match IR basic block labels (#88979)
Labels are matched using a regexp of the form '^(pattern):', which
requires the addition of a "suffix" concept to NamelessValue.
Aside fr
update_test_checks: match IR basic block labels (#88979)
Labels are matched using a regexp of the form '^(pattern):', which
requires the addition of a "suffix" concept to NamelessValue.
Aside from that, the key challenge is that block labels are values, and
we typically capture values including the prefix '%'. However, when
labels appear at the start of a basic block, the prefix '%' is not
included, so we must capture block label values *without* the prefix
'%'.
We don't know ahead of time whether an IR value is a label or not. In
most cases, they are prefixed by the word "label" (their type), but this
isn't the case in phi nodes. We solve this issue by leveraging the
two-phase nature of variable generalization: the first pass finds all
occurences of a variable and determines whether the '%' prefix can be
included or not. The second pass does the actual substitution.
This change also unifies the generalization path for assembly with that
for IR and analysis, in the hope that any future changes avoid diverging
those cases future.
I also considered the alternative of trying to detect the phi node case
using more regular expression special cases but ultimately decided
against that because it seemed more fragile, and perhaps the approach of
keeping a tentative prefix that may later be discarded could also be
eventually applied to some metadata and attribute cases.
Note that an early version of this change was reviewed as
https://reviews.llvm.org/D142452, before version numbers were
introduced. This is a substantially updated version of that change.
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Revision tags: llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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08a69681 |
| 28-Nov-2023 |
Florian Hahn <flo@fhahn.com> |
[UTC] Support arm64-apple-macosx in update_llc_test_checks.py. (#73568)
arm64-apple-macosx is the default triple (usually with the macOS version
number) on arm64 macOS. Support it in update_llc_tes
[UTC] Support arm64-apple-macosx in update_llc_test_checks.py. (#73568)
arm64-apple-macosx is the default triple (usually with the macOS version
number) on arm64 macOS. Support it in update_llc_test_checks.py.
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2 |
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0495cd89 |
| 21-Sep-2023 |
Paulo Matos <pmatos@igalia.com> |
[UpdateTestChecks] Add support for SPIRV in update_llc_test_checks.py (#66213)
Support for SPIRV added, updated test SPV_INTEL_optnone.ll using the script.
Previously https://reviews.llvm.org/D15
[UpdateTestChecks] Add support for SPIRV in update_llc_test_checks.py (#66213)
Support for SPIRV added, updated test SPV_INTEL_optnone.ll using the script.
Previously https://reviews.llvm.org/D157858
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Revision tags: llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6 |
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2f62803e |
| 03-Jun-2023 |
Sheng <ox59616e@gmail.com> |
coach UpdateTestChecks to filter out certain symbol aliases for m68k
This patch coaches UpdateTestChecks to filter out these symbol aliases in llc test for m68k - .L<function name>$local: - .type .L
coach UpdateTestChecks to filter out certain symbol aliases for m68k
This patch coaches UpdateTestChecks to filter out these symbol aliases in llc test for m68k - .L<function name>$local: - .type .L<function name>$local,@function
Reviewed By: myhsu
Differential Revision: https://reviews.llvm.org/D151526
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Revision tags: llvmorg-16.0.5, llvmorg-16.0.4 |
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b71edfaa |
| 15-May-2023 |
Tobias Hieta <tobias@hieta.se> |
[NFC][Py Reformat] Reformat python files in llvm
This is the first commit in a series that will reformat all the python files in the LLVM repository.
Reformatting is done with `black`.
See more in
[NFC][Py Reformat] Reformat python files in llvm
This is the first commit in a series that will reformat all the python files in the LLVM repository.
Reformatting is done with `black`.
See more information here:
https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style
Reviewed By: jhenderson, JDevlieghere, MatzeB
Differential Revision: https://reviews.llvm.org/D150545
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caf22ec6 |
| 05-May-2023 |
Jay Foad <jay.foad@amd.com> |
[UpdateTestChecks] More support for X86 exception handling
Differential Revision: https://reviews.llvm.org/D149971
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Revision tags: llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init |
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a26d3031 |
| 24-Jan-2023 |
Nikita Popov <npopov@redhat.com> |
[UTC] Include return type/attributes under --version 2
If --function-signature is used with --version 2, then also include the return type/attributes in the check lines. This is the implementation o
[UTC] Include return type/attributes under --version 2
If --function-signature is used with --version 2, then also include the return type/attributes in the check lines. This is the implementation of D133943 rebased on the --version mechanism from D142473.
This doesn't bump the default version yet, because I'd like to do that together with D140212 (which enables --function-signature by default), as these changes seem closely related. For now this functionality can be accessed by explicitly passing --version 2 to UTC.
Fixes https://github.com/llvm/llvm-project/issues/61058.
Differential Revision: https://reviews.llvm.org/D144963
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0f2c071f |
| 12-Jan-2023 |
Nikita Popov <npopov@redhat.com> |
[UpdateTestChecks] Handle nounwind functions for s390x
Unlike all the other architectures, s390x requires cfi_startproc to be present, so update_llc_test_checks did no work with nounwind functions.
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Revision tags: llvmorg-15.0.7 |
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f085d089 |
| 06-Jan-2023 |
Luke Lau <luke@igalia.com> |
[UpdateTestChecks] Add wasm64 target
wasm32 was already supported, so here I've just reused the same regex. I'm not sure if this is actually correct: I don't know for certain if wasm32 and wasm64 ha
[UpdateTestChecks] Add wasm64 target
wasm32 was already supported, so here I've just reused the same regex. I'm not sure if this is actually correct: I don't know for certain if wasm32 and wasm64 have different output formats, but it seems to work.
Reviewed By: dschuff, asb
Differential Revision: https://reviews.llvm.org/D141130
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6210127b |
| 15-Dec-2022 |
Kai Nacke <kai.peter.nacke@ibm.com> |
[UpdateTestChecks][PowerPC] Add ppc64 triple support
Newer tests use ppc64le-linux triple. It is identical to ppc32. Some of the PPC GIsel tests were generated by this change.
Reviewed by: RKSimon
[UpdateTestChecks][PowerPC] Add ppc64 triple support
Newer tests use ppc64le-linux triple. It is identical to ppc32. Some of the PPC GIsel tests were generated by this change.
Reviewed by: RKSimon
Differential Revision: https://reviews.llvm.org/D140107
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Revision tags: llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3 |
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8727248b |
| 12-Oct-2022 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[UpdateTestChecks] Add basic BPF triple handling
Working on Issue #57872 - its really useful to be able to autogenerate checks
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Revision tags: working, llvmorg-15.0.2, llvmorg-15.0.1 |
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4658366d |
| 05-Sep-2022 |
Eli Friedman <efriedma@quicinc.com> |
[ARM64EC 3/?] Mark reserved registers specific to ARM64EC ABI.
Part of patchset to add initial support for ARM64EC.
I'm not completely sure I understand the reason for this restriction, but Microso
[ARM64EC 3/?] Mark reserved registers specific to ARM64EC ABI.
Part of patchset to add initial support for ARM64EC.
I'm not completely sure I understand the reason for this restriction, but Microsoft documentation says that asynchronous signals clobber these registers, so we can't ever use them.
As far as I know, none of these registers have any hardcoded meaning, so reserving them shouldn't have any significant side-effects.
Differental Revision: https://reviews.llvm.org/D125413
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Revision tags: llvmorg-15.0.0 |
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0483b008 |
| 25-Aug-2022 |
Alex Richardson <alexrichardson@google.com> |
Mark the $local function begin symbol as a function
While this does not matter for most targets, when building for Arm Morello, we have to mark the symbol as a function and add size information, so
Mark the $local function begin symbol as a function
While this does not matter for most targets, when building for Arm Morello, we have to mark the symbol as a function and add size information, so that LLD can correctly evaluate relocations against the local symbol. Since Morello is an out-of-tree target, I tried to reproduce this with in-tree backends and with the previous reviews applied this results in a noticeable difference when targeting Thumb.
Background: Morello uses a method similar Thumb where the encoding mode is specified in the LSB of the symbol. If we don't mark the target as a function, the relocation will not have the LSB set and calls will end up using the wrong encoding mode (which will almost certainly crash).
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D131429
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Revision tags: llvmorg-15.0.0-rc3 |
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2616e009 |
| 24-Aug-2022 |
Alex Richardson <alexrichardson@google.com> |
[update_llc_test_checks][VE] Handle .Lfoo$local in function regex
While working on https://reviews.llvm.org/D131429, I got a test diff in one of the VE tests and running update_llc_test_checks.py de
[update_llc_test_checks][VE] Handle .Lfoo$local in function regex
While working on https://reviews.llvm.org/D131429, I got a test diff in one of the VE tests and running update_llc_test_checks.py deleted all the code for that function. This updates the regex to handle this new output.
Reviewed By: kaz7
Differential Revision: https://reviews.llvm.org/D131431
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9a2b14af |
| 09-Aug-2022 |
Alex Richardson <alexrichardson@google.com> |
[ARM] Emit local aliases (.Lfoo$local) for functions
ARMAsmPrinter::emitFunctionEntryLabel() was not calling the base class function so the $local alias was not being emitted. This should not have a
[ARM] Emit local aliases (.Lfoo$local) for functions
ARMAsmPrinter::emitFunctionEntryLabel() was not calling the base class function so the $local alias was not being emitted. This should not have any function effect right now since ARM does not generate different code for the $local symbols, but it could be improved in the future.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D131392
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Revision tags: llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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#
5a4033c3 |
| 19-Jul-2022 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
update-test-checks: safely handle tests with #if's
There is at least one Clang test (clang/test/CodeGen/arm_acle.c) which has functions guarded by #if's that cause those functions to be compiled onl
update-test-checks: safely handle tests with #if's
There is at least one Clang test (clang/test/CodeGen/arm_acle.c) which has functions guarded by #if's that cause those functions to be compiled only for a subset of RUN lines.
This results in a case where one RUN line has a body for the function and another doesn't. Treat this case as a conflict for any prefixes that the two RUN lines have in common.
This change exposed a bug where functions with '$' in the name weren't properly recognized in ARM assembly (despite there being a test case that was supposed to catch the problem!). This bug is fixed as well.
Differential Revision: https://reviews.llvm.org/D130089
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#
53d5aceb |
| 06-Jul-2022 |
wanglei <wanglei@loongson.cn> |
[LoongArch] Add LoongArch support to update_llc_test_checks
Add LoongArch assembly scrubbing and triple support to update_llc_test_checks.
Depends on D128432
Reviewed By: MaskRay, xen0n
Different
[LoongArch] Add LoongArch support to update_llc_test_checks
Add LoongArch assembly scrubbing and triple support to update_llc_test_checks.
Depends on D128432
Reviewed By: MaskRay, xen0n
Differential Revision: https://reviews.llvm.org/D128433
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d100a30a |
| 03-Jul-2022 |
David Green <david.green@arm.com> |
[AArch64] Regenerate more tests. NFC
Also includes some adjustments for asm.py to handle updating more cases successfully.
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Revision tags: llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2 |
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#
f15c6021 |
| 22-Apr-2022 |
Mircea Trofin <mtrofin@google.com> |
[UpdateTestChecks] Auto-generate stub bodies for unused prefixes
This is scoped to autogenerated tests.
The goal is to support having each RUN line specify a list of check-prefixes where one can sp
[UpdateTestChecks] Auto-generate stub bodies for unused prefixes
This is scoped to autogenerated tests.
The goal is to support having each RUN line specify a list of check-prefixes where one can specify potentially redundant prefixes. For example, for X86, if one specified prefixes for both AVX1 and AVX2, and the codegen happened to match today, one of the prefixes would be used and the onther one not. If the unused prefix were dropped, and later, codegen differences were introduced, one would have to go figure out where to add what prefix (paraphrasing https://lists.llvm.org/pipermail/llvm-dev/2021-February/148326.html)
To avoid getting errors due to unused prefixes, whole directories can be opted out (as discussed on that thread), but that means that tests that aren't autogenerated in such directories could have undetected unused prefix bugs.
This patch proposes an alternative that both avoids the above, dir-level optout, and supports the main autogen scenario discussed first. The autogen tool appends at the end of the test file the list of unused prefixes, together with a note explaining that is the case. Each prefix is set up to always pass.
This way, unexpected unused prefixes are easily discoverable, and expected cases "just work".
Differential Revision: https://reviews.llvm.org/D124306
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#
37a68497 |
| 12-May-2022 |
Alex Richardson <alexrichardson@google.com> |
[update_llc_test_checks] Use FileCheck captures for MCInst/MCReg output
To avoid test churn when backends add/rename new instructions/registers, it makes sense to use FileCheck captures for the exac
[update_llc_test_checks] Use FileCheck captures for MCInst/MCReg output
To avoid test churn when backends add/rename new instructions/registers, it makes sense to use FileCheck captures for the exact MCInst/Reg number. This is motivated by D125307, where I use --asm-show-inst to differentiate the output for multiple instructions with the same mnemonic.
This does not quite fix the churn issue yet: While files with the generated checks will be immune to the numbers changing, the update script test still suffers from this problem since the number is encoded in the FileCheck variable name. I plan to address this in a follow-up patch.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D125307
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