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42a4d5e8 |
| 16-Nov-2023 |
ZhaoQi <zhaoqi01@loongson.cn> |
[LoongArch] Set isBarrier to true for instruction 'b' (#72339)
Instr "b offs26" represent to an unconditional branch in LoongArch. Set
isBarrier to 1 in tablegen for it, so that MCInstrAnalysis can
[LoongArch] Set isBarrier to true for instruction 'b' (#72339)
Instr "b offs26" represent to an unconditional branch in LoongArch. Set
isBarrier to 1 in tablegen for it, so that MCInstrAnalysis can return
correctly.
Fixes https://github.com/llvm/llvm-project/pull/71903.
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f7d78470 |
| 10-Nov-2023 |
ZhaoQi <zhaoqi01@loongson.cn> |
[LoongArch][MC] Refine MCInstrAnalysis based on registers used (#71276)
MCInstrAnalysis can return properties of instructions (e.g., isCall(),
isBranch(),...) based on the informations that MCInstr
[LoongArch][MC] Refine MCInstrAnalysis based on registers used (#71276)
MCInstrAnalysis can return properties of instructions (e.g., isCall(),
isBranch(),...) based on the informations that MCInstrDesc can get from
*InstrInfo*.td files. These infos are based on opcodes only, but JIRL
can have different properties based on different registers used.
So this patch refines several MCInstrAnalysis methods: isTerminator,
isCall,isReturn,isBranch,isUnconditionalBranch and isIndirectBranch.
This patch also allows BOLT which will be supported on LoongArch later
to get right instruction infos.
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