Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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bb3f5e1f |
| 14-Nov-2024 |
Matin Raayai <30674652+matinraayai@users.noreply.github.com> |
Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)
Following discussions in #110443, and the following earlier discussions
in https://lists.llvm.org/pipermail/llvm-dev/2017-October/
Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)
Following discussions in #110443, and the following earlier discussions
in https://lists.llvm.org/pipermail/llvm-dev/2017-October/117907.html,
https://reviews.llvm.org/D38482, https://reviews.llvm.org/D38489, this
PR attempts to overhaul the `TargetMachine` and `LLVMTargetMachine`
interface classes. More specifically:
1. Makes `TargetMachine` the only class implemented under
`TargetMachine.h` in the `Target` library.
2. `TargetMachine` contains target-specific interface functions that
relate to IR/CodeGen/MC constructs, whereas before (at least on paper)
it was supposed to have only IR/MC constructs. Any Target that doesn't
want to use the independent code generator simply does not implement
them, and returns either `false` or `nullptr`.
3. Renames `LLVMTargetMachine` to `CodeGenCommonTMImpl`. This renaming
aims to make the purpose of `LLVMTargetMachine` clearer. Its interface
was moved under the CodeGen library, to further emphasis its usage in
Targets that use CodeGen directly.
4. Makes `TargetMachine` the only interface used across LLVM and its
projects. With these changes, `CodeGenCommonTMImpl` is simply a set of
shared function implementations of `TargetMachine`, and CodeGen users
don't need to static cast to `LLVMTargetMachine` every time they need a
CodeGen-specific feature of the `TargetMachine`.
5. More importantly, does not change any requirements regarding library
linking.
cc @arsenm @aeubanks
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
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74deadf1 |
| 29-Jun-2024 |
Nikita Popov <llvm@npopov.com> |
[IRBuilder] Don't include Module.h (NFC) (#97159)
This used to be necessary to fetch the DataLayout, but isn't anymore.
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Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4 |
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8cd8ebe1 |
| 16-Apr-2024 |
Aiden Grossman <aidengrossman@google.com> |
[MLGO] Use double comparison facilities for reg alloc scoring tests (#88862)
This patch switches from using direct equality (ASSERT_EQ) to the
floating point comparison facilities (ASSERT_DOUBLE_EQ
[MLGO] Use double comparison facilities for reg alloc scoring tests (#88862)
This patch switches from using direct equality (ASSERT_EQ) to the
floating point comparison facilities (ASSERT_DOUBLE_EQ) within google
test to avoid weird floating point problems. There is at least one
downstream that maintains a patch for issues cropping up from the direct
equality.
https://gitlab.alpinelinux.org/alpine/aports/-/blob/master/main/llvm17/allocscore.patch
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Revision tags: llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init |
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8dcdc37a |
| 12-Jan-2023 |
Jay Foad <jay.foad@amd.com> |
[MC] Store operand info immediately after the TargetInsts table. NFC.
This shrinks MCInstrDesc (and hence the whole TargetInsts table) because we can store a 16-bit offset value to access the operan
[MC] Store operand info immediately after the TargetInsts table. NFC.
This shrinks MCInstrDesc (and hence the whole TargetInsts table) because we can store a 16-bit offset value to access the operands info, instead of a pointer. This also reduces the number of relocs that need to be applied when LLVM is compiled as position-independent code.
Differential Revision: https://reviews.llvm.org/D142219
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1220c5d4 |
| 12-Jan-2023 |
Jay Foad <jay.foad@amd.com> |
[MC] Store implicit ops immediately after the TargetInsts table. NFC.
This shrinks MCInstrDesc (and hence the whole TargetInsts table) because we can store a 16-bit offset value to access the implic
[MC] Store implicit ops immediately after the TargetInsts table. NFC.
This shrinks MCInstrDesc (and hence the whole TargetInsts table) because we can store a 16-bit offset value to access the implicit operands, instead of a pointer. This also reduces the number of relocs that need to be applied when LLVM is compiled as position-independent code.
Differential Revision: https://reviews.llvm.org/D142218
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62c7f035 |
| 07-Feb-2023 |
Archibald Elliott <archibald.elliott@arm.com> |
[NFC][TargetParser] Remove llvm/ADT/Triple.h
I also ran `git clang-format` to get the headers in the right order for the new location, which has changed the order of other headers in two files.
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Revision tags: llvmorg-15.0.7 |
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d8ce50e3 |
| 11-Jan-2023 |
Jay Foad <jay.foad@amd.com> |
[MC] Store number of implicit operands in MCInstrDesc. NFC.
Combine the implicit uses and defs lists into a single list of uses followed by defs. Instead of 0-terminating the list, store the number
[MC] Store number of implicit operands in MCInstrDesc. NFC.
Combine the implicit uses and defs lists into a single list of uses followed by defs. Instead of 0-terminating the list, store the number of uses and defs. This avoids having to scan the whole list to find the length and removes one pointer from MCInstrDesc (although it does not get any smaller due to alignment issues).
Remove the old accessor methods getImplicitUses, getNumImplicitUses, getImplicitDefs and getNumImplicitDefs as all clients are using the new implicit_uses and implicit_defs.
Differential Revision: https://reviews.llvm.org/D142216
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Revision tags: llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
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fd722c59 |
| 07-Dec-2021 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
Fix MSVC "not all control paths return a value" warning. NFC.
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fa99cb64 |
| 06-Dec-2021 |
Mircea Trofin <mtrofin@google.com> |
[mlgo][regalloc] Add score calculation for training
Add the calculation of a score, which will be used during ML training. The score qualifies the quality of a regalloc policy, and is independent of
[mlgo][regalloc] Add score calculation for training
Add the calculation of a score, which will be used during ML training. The score qualifies the quality of a regalloc policy, and is independent of what we train (currently, just eviction), or the regalloc algo itself. We can then use scores to guide training (which happens offline), by formulating a reward based on score variation - the goal being lowering scores (currently, that reward is percentage reduction relative to Greedy's heuristic)
Currently, we compute the score by factoring different instruction counts (loads, stores, etc) with the machine basic block frequency, regardless of the instructions' provenance - i.e. they could be due to the regalloc policy or be introduced previously. This is different from RAGreedy::reportStats, which accummulates the effects of the allocator alone. We explored this alternative but found (at least currently) that the more naive alternative introduced here produces better policies. We do intend to consolidate the two, however, as we are actively investigating improvements to our reward function, and will likely want to re-explore scoring just the effects of the allocator.
In either case, we want to decouple score calculation from allocation algorighm, as we currently evaluate it after a few more passes after allocation (also, because score calculation should be reusable regardless of allocation algorithm).
We intentionally accummulate counts independently because it facilitates per-block reporting, which we found useful for debugging - for instance, we can easily report the counts indepdently, and then cross-reference with perf counter measurements.
Differential Revision: https://reviews.llvm.org/D115195
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