Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2 |
|
#
8241106b |
| 31-Jan-2024 |
Min-Yih Hsu <min.hsu@sifive.com> |
[Exegesis] Print epsilon value in the sched model inconsistency report (#80080)
Since I've formatted the epsilon value, I don't think it's necessary to
escape it.
|
Revision tags: llvmorg-18.1.0-rc1 |
|
#
faf675ce |
| 29-Jan-2024 |
Aiden Grossman <agrossman154@yahoo.com> |
[llvm-exegesis] Remove llvm prefix where unnecessary (#79802)
This patch removes the llvm:: prefix within llvm-exegesis where it is
not necessary. This is most occurrences of the prefix within exeg
[llvm-exegesis] Remove llvm prefix where unnecessary (#79802)
This patch removes the llvm:: prefix within llvm-exegesis where it is
not necessary. This is most occurrences of the prefix within exegesis as
exegesis is within the llvm namespace. This patch makes things more
consistent as the vast majority of the code did not use the llvm::
prefix for anything.
show more ...
|
Revision tags: llvmorg-19-init |
|
#
c630f95f |
| 06-Dec-2023 |
Kazu Hirata <kazu@google.com> |
[llvm-exegesis] Remove unnecessary includes (NFC)
Identified with clangd.
|
Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4 |
|
#
85e3875a |
| 23-Aug-2023 |
Michael Maitland <michaeltmaitland@gmail.com> |
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
D150312 added a TODO:
TODO: consider renaming the field `StartAtCycle` and `Cycles` to `AcquireAtCycle` and `ReleaseAtCycle` r
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
D150312 added a TODO:
TODO: consider renaming the field `StartAtCycle` and `Cycles` to `AcquireAtCycle` and `ReleaseAtCycle` respectively, to stress the fact that resource allocation is now represented as an interval, relatively to the issue cycle of the instruction.
This patch implements that TODO. This naming clarifies how to use these fields in the scheduler. In addition it was confusing that `StartAtCycle` was singular but `Cycles` was plural. This renaming fixes this inconsistency.
This commit as previously reverted since it missed renaming that came down after rebasing. This version of the commit fixes those problems.
Differential Revision: https://reviews.llvm.org/D158568
show more ...
|
#
71bfec76 |
| 24-Aug-2023 |
Michael Maitland <michaeltmaitland@gmail.com> |
Revert "[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics"
This reverts commit 5b854f2c23ea1b000cb4cac4c0fea77326c03d43.
Build still failing.
|
#
5b854f2c |
| 23-Aug-2023 |
Michael Maitland <michaeltmaitland@gmail.com> |
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
D150312 added a TODO:
TODO: consider renaming the field `StartAtCycle` and `Cycles` to `AcquireAtCycle` and `ReleaseAtCycle` r
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
D150312 added a TODO:
TODO: consider renaming the field `StartAtCycle` and `Cycles` to `AcquireAtCycle` and `ReleaseAtCycle` respectively, to stress the fact that resource allocation is now represented as an interval, relatively to the issue cycle of the instruction.
This patch implements that TODO. This naming clarifies how to use these fields in the scheduler. In addition it was confusing that `StartAtCycle` was singular but `Cycles` was plural. This renaming fixes this inconsistency.
This commit as previously reverted since it missed renaming that came down after rebasing. This version of the commit fixes those problems.
Differential Revision: https://reviews.llvm.org/D158568
show more ...
|
#
4d27dffb |
| 24-Aug-2023 |
Michael Maitland <michaeltmaitland@gmail.com> |
Revert "[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics"
This reverts commit 030d33409568b2f0ea61116e83fd40ca27ba33ac.
This commit is causing build failures
|
#
030d3340 |
| 23-Aug-2023 |
Michael Maitland <michaeltmaitland@gmail.com> |
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
D150312 added a TODO:
TODO: consider renaming the field `StartAtCycle` and `Cycles` to `AcquireAtCycle` and `ReleaseAtCycle` r
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
D150312 added a TODO:
TODO: consider renaming the field `StartAtCycle` and `Cycles` to `AcquireAtCycle` and `ReleaseAtCycle` respectively, to stress the fact that resource allocation is now represented as an interval, relatively to the issue cycle of the instruction.
This patch implements that TODO. This naming clarifies how to use these fields in the scheduler. In addition it was confusing that `StartAtCycle` was singular but `Cycles` was plural. This renaming fixes this inconsistency.
Differential Revision: https://reviews.llvm.org/D158568
show more ...
|
Revision tags: llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1 |
|
#
39fc67b8 |
| 04-Apr-2023 |
Pavel Kosov <kpdev42@gmail.com> |
[llvm-exegesis] Factor out DisassemblerHelper from the Analysis class
As part of preparing the reports, the Analysis class needs to print machine instructions in a disassembled form. For this purpos
[llvm-exegesis] Factor out DisassemblerHelper from the Analysis class
As part of preparing the reports, the Analysis class needs to print machine instructions in a disassembled form. For this purpose, the class has four fields (namely Context_, AsmInfo_, InstPrinter_ and Disasm_). All the constructor of the Analysis class does is conditionally initializing these four fields.
This commit factors out the logic for decoding machine code and printing it in an assembler form into a separate DisassemblerHelper class.
~~
Huawei RRI, OS Lab
Reviewed By: courbet
Differential Revision: https://reviews.llvm.org/D147156
show more ...
|
#
389bf5d8 |
| 27-Mar-2023 |
Aiden Grossman <agrossman154@yahoo.com> |
[llvm-exegesis] Refactor InstructionBenchmark to Benchmark
When llvm-exegesis was first introduced, it only supported benchmarking individual instructions, hence the name for the data structure stor
[llvm-exegesis] Refactor InstructionBenchmark to Benchmark
When llvm-exegesis was first introduced, it only supported benchmarking individual instructions, hence the name for the data structure storing the data corresponding to a benchmark being called InstructionBenchmark made sense. However, now that benchmarking arbitrary snippets is supported, InstructionBenchmark doesn't correspond to a single instruction. This patch refactors InstructionBenchmark to be called Benchmark to clean up this little bit of technical debt.
Reviewed By: courbet
Differential Revision: https://reviews.llvm.org/D146884
show more ...
|
Revision tags: llvmorg-16.0.0 |
|
#
8bdf3878 |
| 15-Mar-2023 |
Kazu Hirata <kazu@google.com> |
Use *{Map,Set}::contains (NFC)
Differential Revision: https://reviews.llvm.org/D146104
|
Revision tags: llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2 |
|
#
e52f8406 |
| 22-Sep-2022 |
Clement Courbet <courbet@google.com> |
Re-land "[llvm-exegesis] Support analyzing results from a different target."
With Mips fixes.
This reverts commit 7daf60e3440b22b79084bb325d823aa3ad8df0f3.
|
#
7daf60e3 |
| 22-Sep-2022 |
Clement Courbet <courbet@google.com> |
Revert "[llvm-exegesis] Support analyzing results from a different target."
Breaks MIPS compile.
This reverts commit cc61c822e05c51e494c50d1e72f963750116ef08.
|
Revision tags: llvmorg-15.0.1 |
|
#
cc61c822 |
| 12-Sep-2022 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Support analyzing results from a different target.
We were using the native triple to parse the benchmarks. Use the triple from the benchmarks file.
Right now this still only allows
[llvm-exegesis] Support analyzing results from a different target.
We were using the native triple to parse the benchmarks. Use the triple from the benchmarks file.
Right now this still only allows analyzing files produced by the current target until D133605 is in.
This also makes the `Analysis` class much less ad-hoc.
Differential Revision: https://reviews.llvm.org/D133697
show more ...
|
Revision tags: llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3 |
|
#
e030f808 |
| 07-Sep-2021 |
Roman Lebedev <lebedev.ri@gmail.com> |
[Exegesis] Native clusterization: sub-partition by sched class id
Currently native clusterization simply groups all benchmarks by the opcode of key instruction, but that is suboptimal in certain cas
[Exegesis] Native clusterization: sub-partition by sched class id
Currently native clusterization simply groups all benchmarks by the opcode of key instruction, but that is suboptimal in certain cases, e.g. where we can already tell that the particular instructions already resolve into different sched classes.
show more ...
|
Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init |
|
#
1def2579 |
| 08-Jul-2021 |
David Blaikie <dblaikie@gmail.com> |
PR51018: Remove explicit conversions from SmallString to StringRef to future-proof against C++23
C++23 will make these conversions ambiguous - so fix them to make the codebase forward-compatible wit
PR51018: Remove explicit conversions from SmallString to StringRef to future-proof against C++23
C++23 will make these conversions ambiguous - so fix them to make the codebase forward-compatible with C++23 (& a follow-up change I've made will make this ambiguous/invalid even in <C++23 so we don't regress this & it generally improves the code anyway)
show more ...
|
Revision tags: llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1 |
|
#
c2f819af |
| 23-May-2021 |
Philipp Krones <philipp.krones@embecosm.com> |
[MC] Refactor MCObjectFileInfo initialization and allow targets to create MCObjectFileInfo
This makes it possible for targets to define their own MCObjectFileInfo. This MCObjectFileInfo is then used
[MC] Refactor MCObjectFileInfo initialization and allow targets to create MCObjectFileInfo
This makes it possible for targets to define their own MCObjectFileInfo. This MCObjectFileInfo is then used to determine things like section alignment.
This is a follow up to D101462 and prepares for the RISCV backend defining the text section alignment depending on the enabled extensions.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101921
show more ...
|
#
632ebc4a |
| 05-May-2021 |
Philipp Krones <philipp.krones@embecosm.com> |
[MC] Untangle MCContext and MCObjectFileInfo
This untangles the MCContext and the MCObjectFileInfo. There is a circular dependency between MCContext and MCObjectFileInfo. Currently this dependency a
[MC] Untangle MCContext and MCObjectFileInfo
This untangles the MCContext and the MCObjectFileInfo. There is a circular dependency between MCContext and MCObjectFileInfo. Currently this dependency also exists during construction: You can't contruct a MOFI without a MCContext without constructing the MCContext with a dummy version of that MOFI first. This removes this dependency during construction. In a perfect world, MCObjectFileInfo wouldn't depend on MCContext at all, but only be stored in the MCContext, like other MC information. This is future work.
This also shifts/adds more information to the MCContext making it more available to the different targets. Namely:
- TargetTriple - ObjectFileType - SubtargetInfo
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101462
show more ...
|
#
907d4e75 |
| 19-Apr-2021 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[llvm-exegesis] Analysis.cpp - use for-range loop. NFCI.
|
#
9e9f991a |
| 19-Apr-2021 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Honor -mcpu in analysis mode.
This is useful to set the baseline model for an unknown CPU.
Fixes PR50013.
Differential Revision: https://reviews.llvm.org/D100743
|
Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1 |
|
#
89e8eb94 |
| 12-Jan-2021 |
Kazu Hirata <kazu@google.com> |
[llvm] Use llvm::find_if (NFC)
|
Revision tags: llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1 |
|
#
902cbcd5 |
| 24-Jul-2020 |
Kazu Hirata <kazu@google.com> |
Use llvm::is_contained where appropriate (NFC)
Summary: This patch replaces std::find with llvm::is_contained where appropriate.
Reviewers: efriedma, nhaehnle
Reviewed By: nhaehnle
Subscribers: a
Use llvm::is_contained where appropriate (NFC)
Summary: This patch replaces std::find with llvm::is_contained where appropriate.
Reviewers: efriedma, nhaehnle
Reviewed By: nhaehnle
Subscribers: arsenm, jvesely, nhaehnle, hiraditya, rogfer01, kerbowa, llvm-commits, vkmr
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D84489
show more ...
|
Revision tags: llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2, llvmorg-10.0.0-rc1 |
|
#
24b7b99b |
| 17-Jan-2020 |
Miloš Stojanović <Milos.Stojanovic@rt-rk.com> |
[llvm-exegesis][NFC] Disassociate snippet generators from benchmark runners
The addition of `inverse_throughput` mode highlighted the disjointedness of snippet generators and benchmark runners becau
[llvm-exegesis][NFC] Disassociate snippet generators from benchmark runners
The addition of `inverse_throughput` mode highlighted the disjointedness of snippet generators and benchmark runners because it used the `UopsSnippetGenerator` with the `LatencyBenchmarkRunner`. To keep the code consistent tie the snippet generators to parallelization/serialization rather than their benchmark runners.
Renaming `LatencySnippetGenerator` -> `SerialSnippetGenerator`. Renaming `UopsSnippetGenerator` -> `ParallelSnippetGenerator`.
Differential Revision: https://reviews.llvm.org/D72928
show more ...
|
Revision tags: llvmorg-11-init |
|
#
6fdd6a7b |
| 11-Jan-2020 |
Fangrui Song <maskray@google.com> |
[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It
[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It is used by no target but X86 in -DLLVM_ENABLE_ASSERTIONS=On builds.
If we ever have the needs to add verbose log to disassemblers, we can record log with a member function, instead of passing it around as an argument.
show more ...
|
#
aa708763 |
| 03-Jan-2020 |
Fangrui Song <maskray@google.com> |
[MC] Add parameter `Address` to MCInstPrinter::printInst
printInst prints a branch/call instruction as `b offset` (there are many variants on various targets) instead of `b address`.
It is a conven
[MC] Add parameter `Address` to MCInstPrinter::printInst
printInst prints a branch/call instruction as `b offset` (there are many variants on various targets) instead of `b address`.
It is a convention to use address instead of offset in most external symbolizers/disassemblers. This difference makes `llvm-objdump -d` output unsatisfactory.
Add `uint64_t Address` to printInst(), so that it can pass the argument to printInstruction(). `raw_ostream &OS` is moved to the last to be consistent with other print* methods.
The next step is to pass `Address` to printInstruction() (generated by tablegen from the instruction set description). We can gradually migrate targets to print addresses instead of offsets.
In any case, downstream projects which don't know `Address` can pass 0 as the argument.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D72172
show more ...
|