[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

[InstCombine] Use disjoint flag for alternate binops

Check the or disjoint flag instead of the weaker MaskedValueIsZero
query.

[InstCombine] Fix for folding select-like `shufflevector` into floating point binary operators. (#85452)

Folding a select-like `shufflevector` into a floating point binary
operators can only be don

[InstCombine] Fix for folding select-like `shufflevector` into floating point binary operators. (#85452)

Folding a select-like `shufflevector` into a floating point binary
operators can only be done if the result is preserved for both case. In
particular, if the common operand of the `shufflevector` and the
floating point binary operator can be a NaN, then the transformation
won't preserve the result value.

show more ...

[InstCombine] Don't treat undef as poison in demanded element simplification

We can only set PoisonElts if the element is poison, not if it is
undef.

Revert "[InstCombine] Favour `m_Poison` in `SimplifyDemandedVectorElts`"

This reverts commit 318d5bff0b65aa7d52fc7004d49587416f0fb564.

Has incomplete test updates.

[InstCombine] Favour `m_Poison` in `SimplifyDemandedVectorElts`

A miscompilation issue has been addressed with refined checking.

[InstCombine] Replace non-demanded undef vector with poison

If an operand (esp to shufflevector or insertelement) is not
demanded, canonicalize it from undef to poison.

[IR] Change shufflevector undef mask to poison

With this patch an undefined mask in a shufflevector will be printed as poison.
This change is done to support the new shufflevector semantics
for unde

[IR] Change shufflevector undef mask to poison

With this patch an undefined mask in a shufflevector will be printed as poison.
This change is done to support the new shufflevector semantics
for undefined mask elements.

Differential Revision: https://reviews.llvm.org/D149210

show more ...

[InstCombine] Regenerate all test checks (NFC)

Due to an improvement to name preservation, a lot of InstCombine
tests now show spurious diffs when regenerated.

Rather than regenerating individual f

[InstCombine] Regenerate all test checks (NFC)

Due to an improvement to name preservation, a lot of InstCombine
tests now show spurious diffs when regenerated.

Rather than regenerating individual files when they get touched,
mass-regenerate all UTC-based InstCombine tests. I have then reset
a number of files showing suspicious diffs where the UTC output
has clearly been manually adjusted. I apologize if I missed
anything in the mass of changes.

show more ...

[InstCombine] Fix assert condition in `foldSelectShuffleOfSelectShuffle`

Bug introduced in e239198cdbbf.

The assert() is making an assumption that the resulting shuffle mask
will always select elem

[InstCombine] Fix assert condition in `foldSelectShuffleOfSelectShuffle`

Bug introduced in e239198cdbbf.

The assert() is making an assumption that the resulting shuffle mask
will always select elements from both vectors, this is untrue in the
case of two shuffles being folded if the former shuffle has a mask with
undef elements in it. In such a case folding the shuffles might result
in a mask which only selects from one of the vectors because the other
elements (in the mask) are undef.

Differential Revision: https://reviews.llvm.org/D136256

show more ...

[InstCombine] fold select shuffles with shared operand together

We don't combine generic shuffles together in IR, but select
shuffles are a special-case because a select shuffle of a
select shuffle

[InstCombine] fold select shuffles with shared operand together

We don't combine generic shuffles together in IR, but select
shuffles are a special-case because a select shuffle of a
select shuffle is just another select shuffle; codegen is
expected to efficiently lower those (select shuffles are also
the canonical form of a vector select with constant condition).

show more ...

[InstCombine] add tests for shuffle-of-shuffle; NFC

[InstCombine] merge shuffled vector negate and multiply

Add the "(0 - X) --> (X * -1)" reverse identity to the list of alternate form binops.

We need a little hack to make the existing logic work b

[InstCombine] merge shuffled vector negate and multiply

Add the "(0 - X) --> (X * -1)" reverse identity to the list of alternate form binops.

We need a little hack to make the existing logic work because it does not expect to
move constants from op0 to op1, but the code comment hopefully makes that clear.
I don't think there are any other identities like that.

Fixes #54364

Differential Revision: https://reviews.llvm.org/D122390

show more ...

[InstCombine] add tests for shuffle of mismatched binops; NFC

[test] Use -passes=instcombine instead of -instcombine in lots of tests. NFC

Another step moving away from the deprecated syntax of specifying
pass pipeline in opt.

Differential Revision: https://r

[test] Use -passes=instcombine instead of -instcombine in lots of tests. NFC

Another step moving away from the deprecated syntax of specifying
pass pipeline in opt.

Differential Revision: https://reviews.llvm.org/D119081

show more ...

[InstCombine] add tests for shuffle + binop; NFC

Add FMF to hasPoisonGeneratingFlags/dropPoisonGeneratingFlags

These flags are documented as generating poison values for particular input values. As such, we should really be consistent about their

Add FMF to hasPoisonGeneratingFlags/dropPoisonGeneratingFlags

These flags are documented as generating poison values for particular input values. As such, we should really be consistent about their handling with how we handle nsw/nuw/exact/inbounds.

Differential Revision: https://reviews.llvm.org/D115460

show more ...

[InstCombine] regenerate test checks; NFC

[InstCombine] don't automatically drop poison-generating flags in SimplifyVectorDemandedElts

I noticed this while reviewing the test diffs in D115460
(and so the diffs in that patch will be reduced

[InstCombine] don't automatically drop poison-generating flags in SimplifyVectorDemandedElts

I noticed this while reviewing the test diffs in D115460
(and so the diffs in that patch will be reduced if this one is applied first).

This is effectively a revert of 3436dc29239d ( https://reviews.llvm.org/rG3436dc29239d ) -
since that commit, we've made several enhancements, so the reasoning there is no longer
valid. Specifically, we added a poison value to IR, and we clarified the behavior of
undef/poison elements in a shuffle mask:
https://llvm.org/docs/LangRef.html#shufflevector-instruction

Alive2 seems to agree that the propagation of flags in the test diffs shown here are valid:
https://alive2.llvm.org/ce/z/UuY-jr
https://alive2.llvm.org/ce/z/GXoMD9
https://alive2.llvm.org/ce/z/nVCyVH

Differential Revision: https://reviews.llvm.org/D115526

show more ...

[InstCombine] use poison as placeholder for undemanded elems

Currently undef is used as a don’t-care vector when constructing a vector using a series of insertelement.
However, this is problematic b

[InstCombine] use poison as placeholder for undemanded elems

Currently undef is used as a don’t-care vector when constructing a vector using a series of insertelement.
However, this is problematic because undef isn’t undefined enough.
Especially, a sequence of insertelement can be optimized to shufflevector, but using undef as its placeholder makes shufflevector a poison-blocking instruction because undef cannot be optimized to poison.
This makes a few straightforward optimizations incorrect, such as:

```
; https://bugs.llvm.org/show_bug.cgi?id=44185

define <4 x float> @insert_not_undef_shuffle_translate_commute(float %x, <4 x float> %y, <4 x float> %q) {
%xv = insertelement <4 x float> %q, float %x, i32 2
%r = shufflevector <4 x float> %y, <4 x float> %xv, <4 x i32> { 0, 6, 2, undef }
ret <4 x float> %r ; %r[3] is undef
}
=>
define <4 x float> @insert_not_undef_shuffle_translate_commute(float %x, <4 x float> %y, <4 x float> %q) {
%r = insertelement <4 x float> %y, float %x, i32 1
ret <4 x float> %r ; %r[3] = %y[3], incorrect if %y[3] = poison
}

Transformation doesn't verify!
ERROR: Target is more poisonous than source
```

I’d like to suggest
1. Using poison as insertelement’s placeholder value (IRBuilder::CreateVectorSplat should be patched too)
2. Updating shufflevector’s semantics to return poison element if mask is undef

Note that poison is currently lowered into UNDEF in SelDag, so codegen part is okay.
m_Undef() matches PoisonValue as well, so existing optimizations will still fire.

The only concern is hidden miscompilations that will go incorrect when poison constant is given.
A conservative way is copying all tests having `insertelement undef` & replacing it with `insertelement poison` & run Alive2 on it, but it will create many tests and people won’t like it. :(

Instead, I’ll simply locally maintain the tests and run Alive2.
If there is any bug found, I’ll report it.

Relevant links: https://bugs.llvm.org/show_bug.cgi?id=43958 , http://lists.llvm.org/pipermail/llvm-dev/2019-November/137242.html

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D93586

show more ...

[InstCombine] remove identity shuffle simplification for mask with undefs

And simultaneously enhance SimplifyDemandedVectorElts() to rcognize that
pattern. That preserves some of the old optimizatio

[InstCombine] remove identity shuffle simplification for mask with undefs

And simultaneously enhance SimplifyDemandedVectorElts() to rcognize that
pattern. That preserves some of the old optimizations in IR.

Given a shuffle that includes undef elements in an otherwise identity mask like:

define <4 x float> @shuffle(<4 x float> %arg) {
%shuf = shufflevector <4 x float> %arg, <4 x float> undef, <4 x i32> <i32 undef, i32 1, i32 2, i32 3>
ret <4 x float> %shuf
}

We were simplifying that to the input operand.

But as discussed in PR43958:
https://bugs.llvm.org/show_bug.cgi?id=43958
...that means that per-vector-element poison that would be stopped by the shuffle can now
leak to the result.

Also note that we still have (and there are tests for) the same transform with no undef
elements in the mask (a fully-defined identity mask). I don't think there's any
controversy about that case - it's a valid transform under any interpretation of
shufflevector/undef/poison.

Looking at a few of the diffs into codegen, I don't see any difference in final asm. So
depending on your perspective, that's good (no real loss of optimization power) or bad
(poison exists in the DAG, so we only partially fixed the bug).

Differential Revision: https://reviews.llvm.org/D70246

show more ...

Revert "Temporarily Revert "Add basic loop fusion pass.""

The reversion apparently deleted the test/Transforms directory.

Will be re-reverting again.

llvm-svn: 358552

[InstCombine] remove overzealous assert for shuffles (PR41419)

As the TODO indicates, instsimplify could be improved.

Should fix:
https://bugs.llvm.org/show_bug.cgi?id=41419

llvm-svn: 357910

[InstCombine] canonicalize select shuffles by commuting

In PR41304:
https://bugs.llvm.org/show_bug.cgi?id=41304
...we have a case where we want to fold a binop of select-shuffle (blended) values.

R

[InstCombine] canonicalize select shuffles by commuting

In PR41304:
https://bugs.llvm.org/show_bug.cgi?id=41304
...we have a case where we want to fold a binop of select-shuffle (blended) values.

Rather than try to match commuted variants of the pattern, we can canonicalize the
shuffles and check for mask equality with commuted operands.

We don't produce arbitrary shuffle masks in instcombine, but select-shuffles are a
special case that the backend is required to handle because we already canonicalize
vector select to this shuffle form.

So there should be no codegen difference from this change. It's possible that this
improves CSE in IR though.

Differential Revision: https://reviews.llvm.org/D60016

llvm-svn: 357366

show more ...

[ValueTracking] More accurate unsigned add overflow detection

Part of D58593.

Compute precise overflow conditions based on all known bits, rather
than just the sign bits. Unsigned a + b overflows i

[ValueTracking] More accurate unsigned add overflow detection

Part of D58593.

Compute precise overflow conditions based on all known bits, rather
than just the sign bits. Unsigned a + b overflows iff a > ~b, and we
can determine whether this always/never happens based on the minimal
and maximal values achievable for a and ~b subject to the known bits
constraint.

llvm-svn: 355072

show more ...