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Revision tags: llvmorg-21-init, llvmorg-19.1.7 |
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231d113c |
| 07-Jan-2025 |
Yingwei Zheng <dtcxzyw2333@gmail.com> |
[InstCombine] Handle commuted patterns in `foldSelectWithSRem` (#121896)
Closes https://github.com/llvm/llvm-project/issues/121771.
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Revision tags: llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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38fffa63 |
| 06-Nov-2024 |
Paul Walker <paul.walker@arm.com> |
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4 |
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a1058776 |
| 21-Aug-2024 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
The idea behind this canonicalization is that it allows us to handle less
patterns, because we know that some will be can
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
The idea behind this canonicalization is that it allows us to handle less
patterns, because we know that some will be canonicalized away. This is
indeed very useful to e.g. know that constants are always on the right.
However, this is only useful if the canonicalization is actually
reliable. This is the case for constants, but not for arguments: Moving
these to the right makes it look like the "more complex" expression is
guaranteed to be on the left, but this is not actually the case in
practice. It fails as soon as you replace the argument with another
instruction.
The end result is that it looks like things correctly work in tests,
while they actually don't. We use the "thwart complexity-based
canonicalization" trick to handle this in tests, but it's often a
challenge for new contributors to get this right, and based on the
regressions this PR originally exposed, we clearly don't get this right
in many cases.
For this reason, I think that it's better to remove this complexity
canonicalization. It will make it much easier to write tests for
commuted cases and make sure that they are handled.
show more ...
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Revision tags: llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5 |
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| #
6309440c |
| 21-Apr-2024 |
Yingwei Zheng <dtcxzyw2333@gmail.com> |
[InstCombine] Fix unexpected overwriting in `foldSelectWithSRem` (#89539)
Fixes #89516
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Revision tags: llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0 |
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ce5b88bf |
| 16-Sep-2023 |
Antonio Frighetto <me@antoniofrighetto.com> |
[InstCombine] Handle constant arms in `select` of `srem` fold
Extend folding for `2^n` euclidean division remainder operations on signed integers by handling the specific instance in which one `sele
[InstCombine] Handle constant arms in `select` of `srem` fold
Extend folding for `2^n` euclidean division remainder operations on signed integers by handling the specific instance in which one `select` arm has already been replaced by 1.
Reported-By: HypheX
Fixes: https://github.com/llvm/llvm-project/issues/66417.
show more ...
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Revision tags: llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2 |
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21169213 |
| 08-Aug-2023 |
Antonio Frighetto <me@antoniofrighetto.com> |
[InstCombine] Fold `select` of `srem` and conditional add
Simplify a pattern that may show up when computing the remainder of euclidean division. Particularly, when the divisor is a power of two and
[InstCombine] Fold `select` of `srem` and conditional add
Simplify a pattern that may show up when computing the remainder of euclidean division. Particularly, when the divisor is a power of two and never negative, the signed remainder can be folded with a bitwise and.
Fixes 64305.
Proofs: https://alive2.llvm.org/ce/z/9_KG6c
Differential Revision: https://reviews.llvm.org/D156811
show more ...
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f5cb6265 |
| 08-Aug-2023 |
Antonio Frighetto <me@antoniofrighetto.com> |
[InstCombine] Introduce tests for D156811
Introduce test cases for folding `select` of `srem` and conditional add.
Differential Revision: https://reviews.llvm.org/D156862
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Revision tags: llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4 |
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452279ef |
| 01-Mar-2023 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] prevent miscompiles from select-of-div/rem transform
This avoids the danger shown in issue #60906. There were no regression tests for these patterns, so these potential failures have b
[InstCombine] prevent miscompiles from select-of-div/rem transform
This avoids the danger shown in issue #60906. There were no regression tests for these patterns, so these potential failures have been around for a long time.
We freeze the condition and preserve the optimization because getting rid of a div/rem is always a win.
Here are a couple of examples that can be corrected by freezing the condition: https://alive2.llvm.org/ce/z/sXHTTC
Differential Revision: https://reviews.llvm.org/D144671
show more ...
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54e51074 |
| 23-Feb-2023 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] add tests for select of div/rem with common operand; NFC
issue #60906
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