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Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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| #
38fffa63 |
| 06-Nov-2024 |
Paul Walker <paul.walker@arm.com> |
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4 |
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| #
a1058776 |
| 21-Aug-2024 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
The idea behind this canonicalization is that it allows us to handle less
patterns, because we know that some will be can
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
The idea behind this canonicalization is that it allows us to handle less
patterns, because we know that some will be canonicalized away. This is
indeed very useful to e.g. know that constants are always on the right.
However, this is only useful if the canonicalization is actually
reliable. This is the case for constants, but not for arguments: Moving
these to the right makes it look like the "more complex" expression is
guaranteed to be on the left, but this is not actually the case in
practice. It fails as soon as you replace the argument with another
instruction.
The end result is that it looks like things correctly work in tests,
while they actually don't. We use the "thwart complexity-based
canonicalization" trick to handle this in tests, but it's often a
challenge for new contributors to get this right, and based on the
regressions this PR originally exposed, we clearly don't get this right
in many cases.
For this reason, I think that it's better to remove this complexity
canonicalization. It will make it much easier to write tests for
commuted cases and make sure that they are handled.
show more ...
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Revision tags: llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3 |
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| #
56b3222b |
| 29-Mar-2024 |
Monad <yanwqmonad@gmail.com> |
[InstCombine] Remove the canonicalization of `trunc` to `i1` (#84628)
Remove the canonicalization of `trunc` to `i1` according to the
suggestion of
https://github.com/llvm/llvm-project/pull/83829#
[InstCombine] Remove the canonicalization of `trunc` to `i1` (#84628)
Remove the canonicalization of `trunc` to `i1` according to the
suggestion of
https://github.com/llvm/llvm-project/pull/83829#issuecomment-1986801166
https://github.com/llvm/llvm-project/blob/a84e66a92d7b97f68aa3ae7d2c5839f3fb0d291d/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp#L737-L745
Alive2: https://alive2.llvm.org/ce/z/cacYVA
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Revision tags: llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3 |
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| #
fd07b8f8 |
| 15-Feb-2024 |
Paul Walker <paul.walker@arm.com> |
[LLVM][tests/Transforms/InstCombine] Convert instances of ConstantExpr based splats to use splat().
This is mostly NFC but some output does change due to consistently inserting into poison rather th
[LLVM][tests/Transforms/InstCombine] Convert instances of ConstantExpr based splats to use splat().
This is mostly NFC but some output does change due to consistently inserting into poison rather than undef and using i64 as the index type for inserts.
show more ...
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Revision tags: llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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| #
7ec4f609 |
| 02-Dec-2023 |
Craig Topper <craig.topper@sifive.com> |
[InstCombine] Infer disjoint flag on Or instructions. (#72912)
The disjoint flag was recently added to IR in #72583
We already set it when we turn an add into an or. This patch sets it on Ors tha
[InstCombine] Infer disjoint flag on Or instructions. (#72912)
The disjoint flag was recently added to IR in #72583
We already set it when we turn an add into an or. This patch sets it on Ors that weren't converted from an Add.
show more ...
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4 |
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| #
a819f6c8 |
| 31-Oct-2022 |
Philip Reames <preames@rivosinc.com> |
[InstCombine] Allow simplify demanded transformations on scalable vectors
Differential Revision: https://reviews.llvm.org/D136475
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| #
656e53e5 |
| 21-Oct-2022 |
Philip Reames <preames@rivosinc.com> |
[instcombine] Add basic test coverage for demanded bits of scalable vectors
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Revision tags: llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5 |
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| #
3f33d67d |
| 05-Jun-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] fold mul with masked low bit operand to trunc+select
https://alive2.llvm.org/ce/z/o7rQ5q
This shows an extra instruction in some cases, but that is caused by an existing canonicalizat
[InstCombine] fold mul with masked low bit operand to trunc+select
https://alive2.llvm.org/ce/z/o7rQ5q
This shows an extra instruction in some cases, but that is caused by an existing canonicalization of trunc -> and+icmp.
Codegen should be better for any target where a multiply is more costly than the most simple ALU op.
This ends up producing the requested x86 asm from issue #55618, but it's not the same IR. We are missing a canonicalization from the negate+mask pattern to the trunc+select created here.
show more ...
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| #
3e6ba890 |
| 30-May-2022 |
zhongyunde <zhongyunde@huawei.com> |
[InstCombine] Fold a mul with bool value into and
Fixes https://github.com/llvm/llvm-project/issues/55599 X * Y --> X & Y, iff X, Y can be only {0, 1}. https://alive2.llvm.org/ce/z/_RsTKF
Reviewe
[InstCombine] Fold a mul with bool value into and
Fixes https://github.com/llvm/llvm-project/issues/55599 X * Y --> X & Y, iff X, Y can be only {0, 1}. https://alive2.llvm.org/ce/z/_RsTKF
Reviewed By: spatel, nikic
Differential Revision: https://reviews.llvm.org/D126040
show more ...
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| #
58b76492 |
| 25-May-2022 |
zhongyunde <zhongyunde@huawei.com> |
[tests] precommit tests for D126040
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D126356
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Revision tags: llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1 |
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| #
14682027 |
| 08-Feb-2022 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[ValueTracking] Add support for X*X self-multiplication
D108992 added KnownBits handling for 'Quadratic Reciprocity' self-multiplication patterns (bit[1] == 0), which can be used for non-undef value
[ValueTracking] Add support for X*X self-multiplication
D108992 added KnownBits handling for 'Quadratic Reciprocity' self-multiplication patterns (bit[1] == 0), which can be used for non-undef values (poison is OK).
This patch adds noundef selfmultiply handling to value tracking so demanded bits patterns can make use of it.
Differential Revision: https://reviews.llvm.org/D117995
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| #
897d92fa |
| 07-Feb-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] generalize 2 LSB of demanded bits for X*X
This is a follow-up suggested in D119060. Instead of checking each of the bottom 2 bits individually, we can check them together and handle th
[InstCombine] generalize 2 LSB of demanded bits for X*X
This is a follow-up suggested in D119060. Instead of checking each of the bottom 2 bits individually, we can check them together and handle the possibility that we demand both together.
https://alive2.llvm.org/ce/z/C2ihC2
Differential Revision: https://reviews.llvm.org/D119139
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| #
3c33b20e |
| 07-Feb-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] add test for demanded 2 low bits of X*X; NFC
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| #
79b3fe80 |
| 05-Feb-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] SimplifyDemandedBits - mul(x,x) is odd iff x is odd
https://alive2.llvm.org/ce/z/AXPr3k
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| #
acdc419c |
| 04-Feb-2022 |
Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> |
[test] Use -passes=instcombine instead of -instcombine in lots of tests. NFC
Another step moving away from the deprecated syntax of specifying pass pipeline in opt.
Differential Revision: https://r
[test] Use -passes=instcombine instead of -instcombine in lots of tests. NFC
Another step moving away from the deprecated syntax of specifying pass pipeline in opt.
Differential Revision: https://reviews.llvm.org/D119081
show more ...
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| #
b9328775 |
| 06-Feb-2022 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine] Add mul(x,x) tests showing miscompile
As raised by @efriedma on D117995 - the source must not be undef to demand any bits in mul(x,x) other than bit[1]
https://alive2.llvm.org/ce/z/Cx
[InstCombine] Add mul(x,x) tests showing miscompile
As raised by @efriedma on D117995 - the source must not be undef to demand any bits in mul(x,x) other than bit[1]
https://alive2.llvm.org/ce/z/Cxkjen
show more ...
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| #
5372160a |
| 05-Feb-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] SimplifyDemandedBits - mul(x,x) - if only demand bit[1] then fold to zero
This is a translation of the fold added to codegen with: 2d1390efbe61
Part of solving issue #48027
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| #
0236c571 |
| 04-Feb-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] try to fold one-demanded-bit-of-multiply
This is a generalization of the icmp fold in D118061 (and that can be abandoned). We're looking for a disguised form of "odd * odd must be odd"
[InstCombine] try to fold one-demanded-bit-of-multiply
This is a generalization of the icmp fold in D118061 (and that can be abandoned). We're looking for a disguised form of "odd * odd must be odd". Some Alive2 proofs to show correctness: https://alive2.llvm.org/ce/z/60Y8hz https://alive2.llvm.org/ce/z/HfAP6R
Differential Revision: https://reviews.llvm.org/D118539
show more ...
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Revision tags: llvmorg-15-init |
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| #
d1dfa9f7 |
| 31-Jan-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] add tests for potential mul demanded bits fold; NFC
This is discussed as an enhancement in D118539.
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| #
4a69c8ef |
| 28-Jan-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] add tests for demanded bit of mul; NFC
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| #
f69379d0 |
| 23-Jan-2022 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine] Add test coverage for PR48683
D108992 added self-multiply handling to KnownBits::mul but we don't use it yet..
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Revision tags: llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2, llvmorg-10.0.0-rc1, llvmorg-11-init, llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2, llvmorg-9.0.1-rc1, llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3, llvmorg-9.0.0-rc2, llvmorg-9.0.0-rc1, llvmorg-10-init, llvmorg-8.0.1, llvmorg-8.0.1-rc4, llvmorg-8.0.1-rc3, llvmorg-8.0.1-rc2, llvmorg-8.0.1-rc1 |
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| #
cee313d2 |
| 17-Apr-2019 |
Eric Christopher <echristo@gmail.com> |
Revert "Temporarily Revert "Add basic loop fusion pass.""
The reversion apparently deleted the test/Transforms directory.
Will be re-reverting again.
llvm-svn: 358552
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Revision tags: llvmorg-8.0.0, llvmorg-8.0.0-rc5, llvmorg-8.0.0-rc4, llvmorg-8.0.0-rc3, llvmorg-7.1.0, llvmorg-7.1.0-rc1, llvmorg-8.0.0-rc2, llvmorg-8.0.0-rc1, llvmorg-7.0.1, llvmorg-7.0.1-rc3, llvmorg-7.0.1-rc2, llvmorg-7.0.1-rc1, llvmorg-7.0.0, llvmorg-7.0.0-rc3, llvmorg-7.0.0-rc2, llvmorg-7.0.0-rc1, llvmorg-6.0.1, llvmorg-6.0.1-rc3, llvmorg-6.0.1-rc2, llvmorg-6.0.1-rc1, llvmorg-5.0.2, llvmorg-5.0.2-rc2, llvmorg-5.0.2-rc1, llvmorg-6.0.0, llvmorg-6.0.0-rc3, llvmorg-6.0.0-rc2, llvmorg-6.0.0-rc1, llvmorg-5.0.1, llvmorg-5.0.1-rc3, llvmorg-5.0.1-rc2, llvmorg-5.0.1-rc1, llvmorg-5.0.0, llvmorg-5.0.0-rc5, llvmorg-5.0.0-rc4, llvmorg-5.0.0-rc3, llvmorg-5.0.0-rc2, llvmorg-5.0.0-rc1, llvmorg-4.0.1, llvmorg-4.0.1-rc3, llvmorg-4.0.1-rc2, llvmorg-4.0.1-rc1, llvmorg-4.0.0, llvmorg-4.0.0-rc4, llvmorg-4.0.0-rc3, llvmorg-4.0.0-rc2, llvmorg-4.0.0-rc1, llvmorg-3.9.1, llvmorg-3.9.1-rc3, llvmorg-3.9.1-rc2, llvmorg-3.9.1-rc1, llvmorg-3.9.0, llvmorg-3.9.0-rc3, llvmorg-3.9.0-rc2, llvmorg-3.9.0-rc1, llvmorg-3.8.1, llvmorg-3.8.1-rc1 |
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| #
6ecf1b67 |
| 05-Apr-2016 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] regenerate checks
utils/update_test_checks.py was improved with: http://reviews.llvm.org/rL265414 to CHECK-NEXT the first line of the IR function. This ensures that nothing bad has hap
[InstCombine] regenerate checks
utils/update_test_checks.py was improved with: http://reviews.llvm.org/rL265414 to CHECK-NEXT the first line of the IR function. This ensures that nothing bad has happened before that.
llvm-svn: 265417
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| #
1395cf0d |
| 25-Mar-2016 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] use FileCheck for better checking
(testing script for autogeneration of check lines)
llvm-svn: 264434
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Revision tags: llvmorg-3.8.0, llvmorg-3.8.0-rc3, llvmorg-3.8.0-rc2, llvmorg-3.8.0-rc1, llvmorg-3.7.1, llvmorg-3.7.1-rc2, llvmorg-3.7.1-rc1, llvmorg-3.7.0, llvmorg-3.7.0-rc4, llvmorg-3.7.0-rc3, studio-1.4, llvmorg-3.7.0-rc2, llvmorg-3.7.0-rc1, llvmorg-3.6.2, llvmorg-3.6.2-rc1, llvmorg-3.6.1, llvmorg-3.6.1-rc1, llvmorg-3.5.2, llvmorg-3.5.2-rc1, llvmorg-3.6.0, llvmorg-3.6.0-rc4, llvmorg-3.6.0-rc3, llvmorg-3.6.0-rc2, llvmorg-3.6.0-rc1, llvmorg-3.5.1, llvmorg-3.5.1-rc2, llvmorg-3.5.1-rc1, llvmorg-3.5.0, llvmorg-3.5.0-rc4, llvmorg-3.5.0-rc3, llvmorg-3.5.0-rc2, llvmorg-3.5.0-rc1, llvmorg-3.4.2, llvmorg-3.4.2-rc1, llvmorg-3.4.1, llvmorg-3.4.1-rc2, llvmorg-3.4.1-rc1, llvmorg-3.4.0, llvmorg-3.4.0-rc3, llvmorg-3.4.0-rc2, llvmorg-3.4.0-rc1, llvmorg-3.3.1-rc1, llvmorg-3.3.0, llvmorg-3.3.0-rc3, llvmorg-3.3.0-rc2, llvmorg-3.3.0-rc1, llvmorg-3.2.0, llvmorg-3.2.0-rc3, llvmorg-3.2.0-rc2, llvmorg-3.2.0-rc1, llvmorg-3.1.0, llvmorg-3.1.0-rc3, llvmorg-3.1.0-rc2, llvmorg-3.1.0-rc1, llvmorg-3.0.0, llvmorg-3.0.0-rc4, llvmorg-3.0.0-rc3, llvmorg-3.0.0-rc2, llvmorg-3.0.0-rc1, llvmorg-2.9.0, llvmorg-2.9.0-rc3, llvmorg-2.9.0-rc2, llvmorg-2.9.0-rc1, llvmorg-2.8.0, llvmorg-2.8.0-rc3, llvmorg-2.8.0-rc2, llvmorg-2.8.0-rc1, llvmorg-2.8.0-rc0, llvmorg-2.7.0, llvmorg-2.6.0 |
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| #
18800927 |
| 11-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Change tests from "opt %s" to "opt < %s" so that opt doesn't see the input filename so that opt doesn't print the input filename in the output so that grep lines in the tests don't unintentionally ma
Change tests from "opt %s" to "opt < %s" so that opt doesn't see the input filename so that opt doesn't print the input filename in the output so that grep lines in the tests don't unintentionally match strings in the input filename.
llvm-svn: 81537
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