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Revision tags: llvmorg-21-init |
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2131115b |
| 25-Jan-2025 |
Fangrui Song <i@maskray.me> |
[InstCombine] Drop Range attribute when simplifying 'fshl' based on demanded bits (#124429)
When simplifying operands based on demanded bits, the return value range
of llvm.fshl might change. Keepi
[InstCombine] Drop Range attribute when simplifying 'fshl' based on demanded bits (#124429)
When simplifying operands based on demanded bits, the return value range
of llvm.fshl might change. Keeping the Range attribute might cause
llvm.fshl to generate a poison and lead to miscompile. Drop the Range
attribute similar to `dropPosonGeneratingFlags` elsewhere.
Fix #124387
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| #
89f2fee9 |
| 25-Jan-2025 |
Fangrui Song <i@maskray.me> |
[InstCombine] Add test for incorrect retention of Range attribute in fshl
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Revision tags: llvmorg-19.1.7 |
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| #
642e493d |
| 11-Jan-2025 |
Amr Hesham <amr96@programmer.net> |
[InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (#122362)
Convert `fshl(x, 0, y)` to `shl(x, and(y, BitWidth - 1))` when BitWidth is pow2
Alive2 proof: htt
[InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (#122362)
Convert `fshl(x, 0, y)` to `shl(x, and(y, BitWidth - 1))` when BitWidth is pow2
Alive2 proof: https://alive2.llvm.org/ce/z/3oTEop Fixes: #122235
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Revision tags: llvmorg-19.1.6 |
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462cb3cd |
| 05-Dec-2024 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144)
If the gep is nusw (usually via inbounds) and the offset is
non-negative, we can infer nuw.
Proof: https://alive2.llvm.org/ce/z
[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144)
If the gep is nusw (usually via inbounds) and the offset is
non-negative, we can infer nuw.
Proof: https://alive2.llvm.org/ce/z/ihztLy
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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4 |
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| #
38fffa63 |
| 06-Nov-2024 |
Paul Walker <paul.walker@arm.com> |
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4 |
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a1058776 |
| 21-Aug-2024 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
The idea behind this canonicalization is that it allows us to handle less
patterns, because we know that some will be can
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
The idea behind this canonicalization is that it allows us to handle less
patterns, because we know that some will be canonicalized away. This is
indeed very useful to e.g. know that constants are always on the right.
However, this is only useful if the canonicalization is actually
reliable. This is the case for constants, but not for arguments: Moving
these to the right makes it look like the "more complex" expression is
guaranteed to be on the left, but this is not actually the case in
practice. It fails as soon as you replace the argument with another
instruction.
The end result is that it looks like things correctly work in tests,
while they actually don't. We use the "thwart complexity-based
canonicalization" trick to handle this in tests, but it's often a
challenge for new contributors to get this right, and based on the
regressions this PR originally exposed, we clearly don't get this right
in many cases.
For this reason, I think that it's better to remove this complexity
canonicalization. It will make it much easier to write tests for
commuted cases and make sure that they are handled.
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Revision tags: llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5 |
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| #
46957a13 |
| 19-Apr-2024 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Fix incorrect fshr to fshl transform
This transform is only valid if the (modular) shift amount is not zero.
Proof: https://alive2.llvm.org/ce/z/WBxn-x
Fixes https://github.com/llvm/
[InstCombine] Fix incorrect fshr to fshl transform
This transform is only valid if the (modular) shift amount is not zero.
Proof: https://alive2.llvm.org/ce/z/WBxn-x
Fixes https://github.com/llvm/llvm-project/issues/89338.
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| #
ab1d988e |
| 19-Apr-2024 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Add test for incorrect fshr transform (#89338)
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Revision tags: llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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| #
3363d23b |
| 13-Dec-2023 |
Eikansh Gupta <quic_eikagupt@quicinc.com> |
[InstCombine] Do not simplify lshr/shl arg if it is part of a rotate pattern
fshl/fshr having first two arguments as same gets lowered to target specific rotate. But based on the uses, one of the ar
[InstCombine] Do not simplify lshr/shl arg if it is part of a rotate pattern
fshl/fshr having first two arguments as same gets lowered to target specific rotate. But based on the uses, one of the arguments can get simplified resulting in different arguments performing equivalent operation.
This patch prevents the simplification of the arguments of lshr/shl if they are part of fshl pattern.
Closes https://github.com/llvm/llvm-project/pull/73441.
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Revision tags: llvmorg-17.0.6 |
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| #
3d81d483 |
| 26-Nov-2023 |
Eikansh Gupta <quic_eikagupt@quicinc.com> |
[InstCombine] Added additional funnel shift tests (NFC)
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Revision tags: llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5 |
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| #
9485d983 |
| 01-Jun-2023 |
Paulo Matos <pmatos@igalia.com> |
[InstCombine] Disable generation of fshl/fshr for rotates
Disable conversion of funnel shifts (fshl/fshr) into rotates unless one of the operands is known to be a constant value.
Reviewed By: nikic
[InstCombine] Disable generation of fshl/fshr for rotates
Disable conversion of funnel shifts (fshl/fshr) into rotates unless one of the operands is known to be a constant value.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D150670
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Revision tags: llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1 |
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| #
cea93839 |
| 24-Mar-2023 |
Jun Zhang <jun@junz.org> |
[InstCombine] Try to recognize bswap pattern when calling funnel shifts
Alive2: https://alive2.llvm.org/ce/z/dxxD7B Fixes: https://github.com/llvm/llvm-project/issues/60690
Signed-off-by: Jun Zhang
[InstCombine] Try to recognize bswap pattern when calling funnel shifts
Alive2: https://alive2.llvm.org/ce/z/dxxD7B Fixes: https://github.com/llvm/llvm-project/issues/60690
Signed-off-by: Jun Zhang <jun@junz.org>
Differential Revision: https://reviews.llvm.org/D146637
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Revision tags: llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2 |
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4ab40eca |
| 03-Oct-2022 |
Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> |
[test][InstCombine] Update some test cases to use opaque pointers
These tests cases were converted using the script at https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34
Differential Re
[test][InstCombine] Update some test cases to use opaque pointers
These tests cases were converted using the script at https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34
Differential Revision: https://reviews.llvm.org/D135094
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Revision tags: llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4 |
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| #
14f25762 |
| 04-May-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] add type constraint to intrinsic+shuffle fold
This check is in the related fold for binops, but it was missed when the code was adapted for intrinsics in 432c199e8473. The new test wou
[InstCombine] add type constraint to intrinsic+shuffle fold
This check is in the related fold for binops, but it was missed when the code was adapted for intrinsics in 432c199e8473. The new test would crash when trying to create a new intrinsic with mismatched types.
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| #
7e6d318c |
| 04-May-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] move shuffle after funnel shift with same-shuffled operands
This extends 432c199e8473 and 9c4770eaab9d9 with an intrinsic cited directly in issue #46238
Eventually, we will want to us
[InstCombine] move shuffle after funnel shift with same-shuffled operands
This extends 432c199e8473 and 9c4770eaab9d9 with an intrinsic cited directly in issue #46238
Eventually, we will want to use llvm::isTriviallyVectorizable() or create some new API for this list, but for now, I am intentionally making a minimum change to reduce risk and only affect an intrinsic with regression tests in place.
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| #
629e1e82 |
| 04-May-2022 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] add tests for funnel-shift with shuffled operands; NFC
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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1 |
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| #
acdc419c |
| 04-Feb-2022 |
Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> |
[test] Use -passes=instcombine instead of -instcombine in lots of tests. NFC
Another step moving away from the deprecated syntax of specifying pass pipeline in opt.
Differential Revision: https://r
[test] Use -passes=instcombine instead of -instcombine in lots of tests. NFC
Another step moving away from the deprecated syntax of specifying pass pipeline in opt.
Differential Revision: https://reviews.llvm.org/D119081
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Revision tags: llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1 |
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| #
9b4db7f7 |
| 14-Oct-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine] Add undef funnel shift amount test coverage
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f68d174c |
| 10-Oct-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
Remove %tmp variables from test cases to appease update_test_checks.py
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803b7123 |
| 10-Oct-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine] Add test case showing rotate intrinsic being split by SimplifyDemandedBits
Noticed while triaging regression report on D88834
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Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4 |
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| #
9ff9c1d8 |
| 25-Sep-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine] matchRotate - support (uniform) constant rotation amounts (PR46895)
This patch adds handling of rotation patterns with constant shift amounts - the next bit will be how we want to supp
[InstCombine] matchRotate - support (uniform) constant rotation amounts (PR46895)
This patch adds handling of rotation patterns with constant shift amounts - the next bit will be how we want to support non-uniform constant vectors.
Differential Revision: https://reviews.llvm.org/D87452
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Revision tags: llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2, llvmorg-10.0.0-rc1, llvmorg-11-init, llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2, llvmorg-9.0.1-rc1, llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3, llvmorg-9.0.0-rc2, llvmorg-9.0.0-rc1, llvmorg-10-init, llvmorg-8.0.1, llvmorg-8.0.1-rc4, llvmorg-8.0.1-rc3 |
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| #
89efefb1 |
| 24-Jun-2019 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] reduce funnel-shift i16 X, X, 8 to bswap X
Prefer the more exact intrinsic to remove a use of the input value and possibly make further transforms easier (we will still need to match p
[InstCombine] reduce funnel-shift i16 X, X, 8 to bswap X
Prefer the more exact intrinsic to remove a use of the input value and possibly make further transforms easier (we will still need to match patterns with funnel-shift of wider types as pieces of bswap, especially if we want to canonicalize to funnel-shift with constant shift amount). Discussed in D46760.
llvm-svn: 364187
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| #
f27f794d |
| 24-Jun-2019 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine] add tests for funnel-shift to bswap; NFC
llvm-svn: 364184
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Revision tags: llvmorg-8.0.1-rc2, llvmorg-8.0.1-rc1 |
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| #
cee313d2 |
| 17-Apr-2019 |
Eric Christopher <echristo@gmail.com> |
Revert "Temporarily Revert "Add basic loop fusion pass.""
The reversion apparently deleted the test/Transforms directory.
Will be re-reverting again.
llvm-svn: 358552
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| #
5ecd6a48 |
| 16-Apr-2019 |
Nikita Popov <nikita.ppv@gmail.com> |
[InstCombine] Prune fshl/fshr with masked operands
If a constant shift amount is used, then only some of the LHS/RHS operand bits are demanded and we may be able to simplify based on that. InstCombi
[InstCombine] Prune fshl/fshr with masked operands
If a constant shift amount is used, then only some of the LHS/RHS operand bits are demanded and we may be able to simplify based on that. InstCombineSimplifyDemanded already had the necessary support for that, we just weren't calling it with fshl/fshr as root.
In particular, this allows us to relax some masked funnel shifts into simple shifts, as shown in the tests.
Patch by Shawn Landden.
Differential Revision: https://reviews.llvm.org/D60660
llvm-svn: 358515
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