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Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5 |
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2c094ac7 |
| 20-Nov-2024 |
Yingwei Zheng <dtcxzyw2333@gmail.com> |
[InstCombine] Drop range attributes in `foldBitCeil` (#116641)
Closes https://github.com/llvm/llvm-project/issues/112076
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Revision tags: llvmorg-19.1.4 |
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38fffa63 |
| 06-Nov-2024 |
Paul Walker <paul.walker@arm.com> |
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6 |
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b5f4210e |
| 13-May-2024 |
Yingwei Zheng <dtcxzyw2333@gmail.com> |
[InstCombine] Drop nuw flag when CtlzOp is a sub nuw (#91776)
See the following case:
```
define i32 @src1(i32 %x) {
%dec = sub nuw i32 -2, %x
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %dec,
[InstCombine] Drop nuw flag when CtlzOp is a sub nuw (#91776)
See the following case:
```
define i32 @src1(i32 %x) {
%dec = sub nuw i32 -2, %x
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %dec, i1 false)
%sub = sub nsw i32 32, %ctlz
%shl = shl i32 1, %sub
%ugt = icmp ult i32 %x, -2
%sel = select i1 %ugt, i32 %shl, i32 1
ret i32 %sel
}
define i32 @tgt1(i32 %x) {
%dec = sub nuw i32 -2, %x
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %dec, i1 false)
%sub = sub nsw i32 32, %ctlz
%and = and i32 %sub, 31
%shl = shl nuw i32 1, %and
ret i32 %shl
}
```
`nuw` in `%dec` should be dropped after the select instruction is
eliminated.
Alive2: https://alive2.llvm.org/ce/z/7S9529
Fixes https://github.com/llvm/llvm-project/issues/91691.
show more ...
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Revision tags: llvmorg-18.1.5 |
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b8f3024a |
| 24-Apr-2024 |
Andreas Jonson <andjo403@hotmail.com> |
[InstCombine] Swap out range metadata to range attribute for cttz/ctlz/ctpop (#88776)
Since all optimizations that use range metadata now also handle range attribute, this patch replaces writes of
[InstCombine] Swap out range metadata to range attribute for cttz/ctlz/ctpop (#88776)
Since all optimizations that use range metadata now also handle range attribute, this patch replaces writes of
range metadata for call instructions to range attributes.
show more ...
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Revision tags: llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2 |
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c41b4b63 |
| 19-Sep-2023 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Make flag drop during select equiv fold more generic
Instead of unsetting flags on the instruction, attempting the
fold, and the resetting the flags if it failed, add support to
simpli
[InstCombine] Make flag drop during select equiv fold more generic
Instead of unsetting flags on the instruction, attempting the
fold, and the resetting the flags if it failed, add support to
simplifyWithOpReplaced() to ignore poison-generating flags/metadata
and collect all instructions where they may need to be dropped.
This allows us to perform the fold a) with poison-generating
metadata, which was previously not handled and b) poison-generating
flags/metadata that are not on the root instruction.
Proof for the ctpop case: https://alive2.llvm.org/ce/z/3H3HFs
Fixes https://github.com/llvm/llvm-project/issues/62450.
show more ...
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Revision tags: llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1 |
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| #
231fa274 |
| 24-Mar-2023 |
Kazu Hirata <kazu@google.com> |
[InstCombine] Generate better code for std::bit_ceil
Without this patch, std::bit_ceil<uint32_t> is compiled as:
%dec = add i32 %x, -1
%lz = tail call i32 @llvm.ctlz.i32(i32 %dec, i1 false)
%
[InstCombine] Generate better code for std::bit_ceil
Without this patch, std::bit_ceil<uint32_t> is compiled as:
%dec = add i32 %x, -1
%lz = tail call i32 @llvm.ctlz.i32(i32 %dec, i1 false)
%sub = sub i32 32, %lz
%res = shl i32 1, %sub
%ugt = icmp ugt i32 %x, 1
%sel = select i1 %ugt, i32 %res, i32 1
With this patch, we generate:
%dec = add i32 %x, -1
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %dec, i1 false)
%sub = sub nsw i32 0, %ctlz
%and = and i32 %1, 31
%sel = shl nuw i32 1, %and
ret i32 %sel
https://alive2.llvm.org/ce/z/pwezvF
This patch recognizes the specific pattern from std::bit_ceil in
libc++ and libstdc++ and drops the conditional move. In addition to
the LLVM IR generated for std::bit_ceil(X), this patch recognizes
variants like:
std::bit_ceil(X - 1)
std::bit_ceil(X + 1)
std::bit_ceil(X + 2)
std::bit_ceil(-X)
std::bit_ceil(~X)
This patch fixes:
https://github.com/llvm/llvm-project/issues/60802
Differential Revision: https://reviews.llvm.org/D145299
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| #
8d93cbed |
| 23-Mar-2023 |
Kazu Hirata <kazu@google.com> |
[InstCombine] Precommit tests
This patch precommits tests for:
https://github.com/llvm/llvm-project/issues/60802
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| #
ef860cf1 |
| 19-Mar-2023 |
Kazu Hirata <kazu@google.com> |
[InstCombine] Precommit tests
This patch precommits tests for:
https://github.com/llvm/llvm-project/issues/60802
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Revision tags: llvmorg-16.0.0 |
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| #
7946e67c |
| 12-Mar-2023 |
Kazu Hirata <kazu@google.com> |
[InstCombine] Precommit tests
This patch precommits tests for:
https://github.com/llvm/llvm-project/issues/60802
https://github.com/llvm/llvm-project/issues/61183
which are about std::bit_ceil and
[InstCombine] Precommit tests
This patch precommits tests for:
https://github.com/llvm/llvm-project/issues/60802
https://github.com/llvm/llvm-project/issues/61183
which are about std::bit_ceil and std::bit_floor, respectively.
show more ...
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