History log of /llvm-project/llvm/test/CodeGen/AMDGPU/code-size-estimate.ll (Results 1 – 7 of 7)
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# 4e707201 27-Jun-2024 Jay Foad <jay.foad@amd.com>

[AMDGPU] Add some gfx1200 test coverage


Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init
# 9e9907f1 17-Jan-2024 Fangrui Song <i@maskray.me>

[AMDGPU,test] Change llc -march= to -mtriple= (#75982)

Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while

[AMDGPU,test] Change llc -march= to -mtriple= (#75982)

Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```

show more ...


# 0d408317 28-Nov-2023 Jay Foad <jay.foad@amd.com>

[AMDGPU] Allow folding to FMAAK with SGPR and immediate operand on GFX10+ (#72266)

Allow foldImmediate to create instructions like:

v_fmaak_f32 v0, s0, v0, 0x42000000

This instruction has tw

[AMDGPU] Allow folding to FMAAK with SGPR and immediate operand on GFX10+ (#72266)

Allow foldImmediate to create instructions like:

v_fmaak_f32 v0, s0, v0, 0x42000000

This instruction has two "scalar values": s0 and 0x42000000. On GFX10+
this is allowed. This fold was originally implemented before the
compiler supported GFX10, when all ASICs were limited to one scalar
value.

show more ...


Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2
# a657deb4 22-Sep-2023 Mirko Brkusanin <Mirko.Brkusanin@amd.com>

[AMDGPU] Update RUN line in test (NFC)


# ecfdc23d 21-Sep-2023 Mirko Brkušanin <Mirko.Brkusanin@amd.com>

[AMDGPU] Select gfx1150 SALU Float instructions (#66885)


Revision tags: llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3
# 1e5359c6 11-Aug-2023 Mirko Brkusanin <Mirko.Brkusanin@amd.com>

[AMDGPU] Treat KIMM32 and KIMM16 operand types as noninlinable

While they are represent 32/16 bit immediate values they are already
included in encoding of the instructions that use them and are not

[AMDGPU] Treat KIMM32 and KIMM16 operand types as noninlinable

While they are represent 32/16 bit immediate values they are already
included in encoding of the instructions that use them and are not true
literals. FMAMK and FMAAK instructions that use them are marked with fixed
size so getInstSizeInBytes will not increase the size for these operands.

We also add tests whose logic relies on KIMM16 and KIMM32 being considered
not inlinable.

Differential Revision: https://reviews.llvm.org/D157624

show more ...


Revision tags: llvmorg-17.0.0-rc2
# 4b1702e8 04-Aug-2023 Matt Arsenault <Matthew.Arsenault@amd.com>

AMDGPU: Fix counting source modifiers as literal constants

This fixes over estimating code size. This was broken by
79f52af4cd9a76485dd50bcdbb5d393eb7a70103.

https://reviews.llvm.org/D157103