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Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6 |
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61510b51 |
| 12-Dec-2024 |
Sander de Smalen <sander.desmalen@arm.com> |
Revert "[AArch64] Enable subreg liveness tracking by default."
This reverts commit 9c319d5bb40785c969d2af76535ca62448dfafa7.
Some issues were discovered with the bootstrap builds, which
seem like t
Revert "[AArch64] Enable subreg liveness tracking by default."
This reverts commit 9c319d5bb40785c969d2af76535ca62448dfafa7.
Some issues were discovered with the bootstrap builds, which
seem like they were caused by this commit. I'm reverting to investigate.
show more ...
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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3 |
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9c319d5b |
| 15-Oct-2024 |
Sander de Smalen <sander.desmalen@arm.com> |
[AArch64] Enable subreg liveness tracking by default.
Internal testing didn't flag up any functional- or performance regressions.
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Revision tags: llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init |
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ff68e43c |
| 20-Jul-2023 |
Jingu Kang <jingu.kang@arm.com> |
[MachineLICM] Handle Subloops
It is a re-commit from reverted commit 3454cf67bd0a650097dc6ca99874a34e1d59b500.
Following discussion on https://reviews.llvm.org/D154205, make MachineLICM pass
handle
[MachineLICM] Handle Subloops
It is a re-commit from reverted commit 3454cf67bd0a650097dc6ca99874a34e1d59b500.
Following discussion on https://reviews.llvm.org/D154205, make MachineLICM pass
handle subloops with only visiting outermost loop's blocks once.
Differential Revision: https://reviews.llvm.org/D154205
show more ...
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3454cf67 |
| 15-Sep-2023 |
Benjamin Kramer <benny.kra@googlemail.com> |
Revert "[MachineLICM] Handle Subloops"
This reverts commit 5ec9699c4d1f165364586d825baef434e2c110b4. It
accesses MI after it has been hoisted.
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5ec9699c |
| 20-Jul-2023 |
Jingu Kang <jingu.kang@arm.com> |
[MachineLICM] Handle Subloops
Following discussion on https://reviews.llvm.org/D154205, make MachineLICM pass
handle subloops with only visiting outermost loop's blocks once.
Differential Revision:
[MachineLICM] Handle Subloops
Following discussion on https://reviews.llvm.org/D154205, make MachineLICM pass
handle subloops with only visiting outermost loop's blocks once.
Differential Revision: https://reviews.llvm.org/D154205
show more ...
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db158c7c |
| 28-Jul-2023 |
Harvin Iriawan <harvin.iriawan@arm.com> |
[AArch64] Update generic sched model to A510
Refresh of the generic scheduling model to use A510 instead of A55.
Main benefits are to the little core, and introducing SVE scheduling information.
[AArch64] Update generic sched model to A510
Refresh of the generic scheduling model to use A510 instead of A55.
Main benefits are to the little core, and introducing SVE scheduling information.
Changes tested on various OoO cores, no performance degradation is seen.
Differential Revision: https://reviews.llvm.org/D156799
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351b4c17 |
| 20-Jul-2023 |
Jingu Kang <jingu.kang@arm.com> |
Revert "[MachineLICM] Handle Subloops"
This reverts commit 50dd383d08670960540fecb4b48c0f0429fbfba3.
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50dd383d |
| 19-Jul-2023 |
Jingu Kang <jingu.kang@arm.com> |
[MachineLICM] Handle Subloops
Following discussion on https://reviews.llvm.org/D154205, make MachineLICM pass
handle subloops with only visiting outmost loop's blocks once.
Differential Revision: h
[MachineLICM] Handle Subloops
Following discussion on https://reviews.llvm.org/D154205, make MachineLICM pass
handle subloops with only visiting outmost loop's blocks once.
Differential Revision: https://reviews.llvm.org/D154205
show more ...
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62ed3ff4 |
| 19-Jul-2023 |
Jingu Kang <jingu.kang@arm.com> |
Revert "[MachineLICM] Handle Subloops"
This reverts commit 33e60484d750291e99301e29e60fe72c8fa48ccd.
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33e60484 |
| 30-Jun-2023 |
Jingu Kang <jingu.kang@arm.com> |
[MachineLICM] Handle Subloops
MachineLICM pass handles inner loops only when outmost loop does not have unique
predecessor. If the loop has preheader and there is loop invariant code, the
invariant
[MachineLICM] Handle Subloops
MachineLICM pass handles inner loops only when outmost loop does not have unique
predecessor. If the loop has preheader and there is loop invariant code, the
invariant code can be hoisted to the preheader in general. This patch makes the
pass handle inner loops in general.
Differential Revision: https://reviews.llvm.org/D154205
show more ...
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041db60b |
| 10-Jul-2023 |
Jingu Kang <jingu.kang@arm.com> |
[tests] Update precommit test for MachineLICM subloops
precommit test for https://reviews.llvm.org/D154205
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6a5da11b |
| 22-Jun-2023 |
Evandro Menezes <evandro+llvm@gcc.gnu.org> |
[AArch64] Add scheduling model for Neoverse N1
Add the scheduling model for Neoverse N1.
Differential revision: https://reviews.llvm.org/D152417
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eadfa280 |
| 30-Jun-2023 |
Jingu Kang <jingu.kang@arm.com> |
[tests] precommit test for MachineLICM subloops
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