Reapply "[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes." (#112203)

This patch adds icmp+select patterns for integer min/max matcher

Reapply "[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes." (#112203)

This patch adds icmp+select patterns for integer min/max matchers in
SDPatternMatch, similar to those in IR PatternMatch.

Reapply #111774.

Closes #108218.

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Revert "[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes." (#112200)

Reverts llvm/llvm-project#111774

This appears to be causing so

Revert "[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes." (#112200)

Reverts llvm/llvm-project#111774

This appears to be causing some tests to fail.

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[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes. (#111774)

Closes #108218.

This patch adds icmp+select patterns for integer min/ma

[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes. (#111774)

Closes #108218.

This patch adds icmp+select patterns for integer min/max matchers in
SDPatternMatch, similar to those in IR PatternMatch.

show more ...

[DAG] Add test coverage for ABD "sub of selects" patterns based off #53045

Add tests for "sub(select(icmp(a,b),a,b),select(icmp(a,b),b,a)) -> abd(a,b)" patterns that still fail to match to abd nodes

[DAG] Add test coverage for ABD "sub of selects" patterns based off #53045

Add tests for "sub(select(icmp(a,b),a,b),select(icmp(a,b),b,a)) -> abd(a,b)" patterns that still fail to match to abd nodes

This will hopefully be helped by #108218

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[DAG] Fix typo in i64/i128 abdu/abds tests

I'd incorrectly swapped the operands in some of the "cmp" test patterns when I changed the condition code

[DAG] Add select_cc -> abd folds (#102137)

Fixes #100810

[ScheduleDAG] Dirty height/depth in addPred/removePred even for latency zero (#102915)

A long time ago (back in 2009) there was a commit 52d4d8244b7c39c5cd
that changed the scheduler to not dirty h

[ScheduleDAG] Dirty height/depth in addPred/removePred even for latency zero (#102915)

A long time ago (back in 2009) there was a commit 52d4d8244b7c39c5cd
that changed the scheduler to not dirty height/depth when adding or
removing SUnit predecessors when the latency on the edge was zero. That
commit message is claiming that the depth or height isn't affected when
the latency is zero.

As a matter of fact, the depth/height can change even with a zero
latency on the edge. If for example adding a new SUnit A, with zero
latency, but as a predecessor to a SUnit B, then both height of A and
depth of B should be marked as dirty. If for example B has a greater
height than A, then the height of A needs to be adjusted even if the
latency is zero.

I think this has been wrong for many years. Downstream we have had
commit 52d4d8244b7c39c5cd reverted since back in 2016. There is no
motivating lit test for 52d4d8244b7c39c5cd (only an incomplete C level
reproducer in https://github.com/llvm/llvm-project/issues/3613).

After commit 13d04fa560e156797c21f1 there finally appeared an upstream
lit test that shows that we get better code if marking height/depth as
dirty (llvm/test/CodeGen/AArch64/abds.ll).

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[DAG] Add legalization handling for ABDS/ABDU (#92576) (REAPPLIED)

Always match ABD patterns pre-legalization, and use TargetLowering::expandABD to expand again during legalization.

abdu(lhs, rhs)

[DAG] Add legalization handling for ABDS/ABDU (#92576) (REAPPLIED)

Always match ABD patterns pre-legalization, and use TargetLowering::expandABD to expand again during legalization.

abdu(lhs, rhs) -> sub(xor(sub(lhs, rhs), usub_overflow(lhs, rhs)), usub_overflow(lhs, rhs))
Alive2: https://alive2.llvm.org/ce/z/dVdMyv

REAPPLIED: Fix regression issue with "abs(ext(x) - ext(y)) -> zext(abd(x, y))" fold failing after type legalization

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Revert b1234ddbe2652aa7948242a57107ca7ab12fd2f8. "[DAG] Add legalization handling for ABDS/ABDU (#92576)"

Reverting #92576 while we identify a reported regression

[DAG] Add legalization handling for ABDS/ABDU (#92576)

Always match ABD patterns pre-legalization, and use TargetLowering::expandABD to expand again during legalization.

abdu(lhs, rhs) -> sub(xor

[DAG] Add legalization handling for ABDS/ABDU (#92576)

Always match ABD patterns pre-legalization, and use TargetLowering::expandABD to expand again during legalization.

abdu(lhs, rhs) -> sub(xor(sub(lhs, rhs), usub_overflow(lhs, rhs)), usub_overflow(lhs, rhs))
Alive2: https://alive2.llvm.org/ce/z/dVdMyv

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[AArch64] Guard against non-vector abd long nodes. (#102026)

This fixes a problem if abd nodes are generated more readily (#92576).
The folding of abd nodes into abdl needs to check that the inputs

[AArch64] Guard against non-vector abd long nodes. (#102026)

This fixes a problem if abd nodes are generated more readily (#92576).
The folding of abd nodes into abdl needs to check that the inputs are
the correct form of vector. The added test requires vector legalization
to occur in order to hit the combine at the wrong time.

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[AArch64] Regenerate abds/abdu tests to remove x86 copy+pasta. NFC

[AArch64][RISCV] Add scalar abds/abdu test coverage - based off #100810

Extend test coverage for #92576 - copied from existing x86 tests