[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC

It looks like they were added to prevent fixed length vectors from
being expanded, but that's no longer the case today:
https://rev

[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC

It looks like they were added to prevent fixed length vectors from
being expanded, but that's no longer the case today:
https://reviews.llvm.org/D121447#3376520

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[RISCV] Add zvfhmin cost model test coverage. NFC

This adds tests coverage for zvfhmin and halfs in general in the cost
model tests.

Some existing half tests were split into separate functions so t

[RISCV] Add zvfhmin cost model test coverage. NFC

This adds tests coverage for zvfhmin and halfs in general in the cost
model tests.

Some existing half tests were split into separate functions so that if
the check prefixes diverge it won't affect the rest of the non-half
instructions.

Whilst we're here, also remove the redundant
-riscv-vector-bits-min=128 and declares.

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[RISCV][CostModel] Updates reduction and shuffle cost (#77342)

- Make `andi` cost 1 in SK_Broadcast
- Query the cost of VID_V, VRSUB_VX/VRSUB_VI which would scale with LMUL

[RISCV] Add tests for reverse shuffles of i1 vectors. NFC

This is to add test coverage for a change in #73342

[RISCV][CostModel] Add getRISCVInstructionCost() to TTI for CostKind (#76793)

Instruction cost for CodeSize and Latency/RecipThroughput can be very
different. Considering the diversity of CostKind

[RISCV][CostModel] Add getRISCVInstructionCost() to TTI for CostKind (#76793)

Instruction cost for CodeSize and Latency/RecipThroughput can be very
different. Considering the diversity of CostKind and vendor-specific
cost, and how they are spread across various TTI functions, it's
becoming quite a challenge to handle. This patch adds an interface
getRISCVInstructionCost to address it.

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Revert "[RISCV][CostModel] Add getRISCVInstructionCost() to TTI for Cost… (#73651)" (#76536)

Fails on bots https://lab.llvm.org/buildbot/#/builders/5/builds/39629

Issue #76535

This reverts com

Revert "[RISCV][CostModel] Add getRISCVInstructionCost() to TTI for Cost… (#73651)" (#76536)

Fails on bots https://lab.llvm.org/buildbot/#/builders/5/builds/39629

Issue #76535

This reverts commit 3e75dece919511e4a2edada82d783304cc14a9cd.

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[RISCV][CostModel] Add getRISCVInstructionCost() to TTI for Cost… (#73651)

…Kind

Instruction cost for CodeSize and Latency/RecipThroughput can be very
different. Considering the diversity of Cos

[RISCV][CostModel] Add getRISCVInstructionCost() to TTI for Cost… (#73651)

…Kind

Instruction cost for CodeSize and Latency/RecipThroughput can be very
different. Considering the diversity of CostKind and vendor-specific
cost, and how they are spread across various TTI functions, it's
becoming quite a challenge to handle. This patch adds an interface
getRISCVInstructionCost to address it.

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[RISCV][CostModel] Add getCFInstrCost RISC-V implementation (#65599)

This patch implements getCFInstrCost TTI hook that mostly affects
LoopVectorizer decisions. It sets zero cost for PHI nodes and

[RISCV][CostModel] Add getCFInstrCost RISC-V implementation (#65599)

This patch implements getCFInstrCost TTI hook that mostly affects
LoopVectorizer decisions. It sets zero cost for PHI nodes and zero
throughput cost for branches (assuming that branches are likely to
be predicted). The implementation is similar to X86/AArch64/PowerPC
targets and reduces loop cost by excluding induction PHIs/loop latch
branches, which in turn leads to selecting smaller vectorization
factor.

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[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

This has been ratified according to https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions

Differential Revision: h

[RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

This has been ratified according to https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions

Differential Revision: https://reviews.llvm.org/D155668

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[RISCV][CostModel] Model vrgather.vv as being quadradic in LMUL

vrgather.vv across multiple vector registers (i.e. LMUL > 1) requires all to all data movement. This includes two conceptual sets of c

[RISCV][CostModel] Model vrgather.vv as being quadradic in LMUL

vrgather.vv across multiple vector registers (i.e. LMUL > 1) requires all to all data movement. This includes two conceptual sets of changes:

For permutes, we were modeling these as being linear in LMUL.
For reverse, we were modeling them as being fixed cost in LMUL.

Both were wrong, and have been adjusted to O(LMUL^2). Noticed via code inspection while looking at something else.

Its worth asking whether we should be lowering reverse to something other than a vrgather at high LMULs. That shuffle is quite expensive. (Future work)

Differential Revision: https://reviews.llvm.org/D152019

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[RISCV] Improve SK_Reverse shuffle costs for fixed length vectors

As noted by @luke (https://reviews.llvm.org/D145953#inline-1409312), we were accounting for the cost of vector element size using vl

[RISCV] Improve SK_Reverse shuffle costs for fixed length vectors

As noted by @luke (https://reviews.llvm.org/D145953#inline-1409312), we were accounting for the cost of vector element size using vlenb whereas the expression can be constant folded for fixed length vectors.

Differential Revision: https://reviews.llvm.org/D145973

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[RISCV] Fallback to scalable lowering costs for fixed length vectors

Fixed vector costs may be more precise, but the actual lowering will use scalable vectors if nothing better is available. During

[RISCV] Fallback to scalable lowering costs for fixed length vectors

Fixed vector costs may be more precise, but the actual lowering will use scalable vectors if nothing better is available. During review, we noticed a case where fixed vector reverse can be improved cost model wise, that will follow seperately.

Differential Revision: https://reviews.llvm.org/D145953

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[RISCV][CostModel] Add a test for reverse shuffles cost on RISCV, NFC

Reviewed By: benshi001

Differential Revision: https://reviews.llvm.org/D134519