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Revision tags: llvmorg-21-init, llvmorg-19.1.7 |
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369c6174 |
| 10-Jan-2025 |
Shao-Ce SUN <sunshaoce@outlook.com> |
[RISCV] Fix the cost of `llvm.vector.reduce.and` (#119160)
I added some CodeGen test cases related to reduce. To maintain
consistency, I also added cases for instructions like
`vector.reduce.or`.
[RISCV] Fix the cost of `llvm.vector.reduce.and` (#119160)
I added some CodeGen test cases related to reduce. To maintain
consistency, I also added cases for instructions like
`vector.reduce.or`.
For cases where `v1i1` type generates `VFIRST`, please refer to:
https://reviews.llvm.org/D139512.
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Revision tags: llvmorg-19.1.6 |
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46829e54 |
| 04-Dec-2024 |
LiqinWeng <liqin.weng@spacemit.com> |
[RISCV][CostModel] Correct the cost of some reductions (#118072)
Reductions include: and/or/max/min
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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1 |
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400b725c |
| 20-Sep-2024 |
Luke Lau <luke@igalia.com> |
[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC
It looks like they were added to prevent fixed length vectors from being expanded, but that's no longer the case today: https://rev
[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC
It looks like they were added to prevent fixed length vectors from being expanded, but that's no longer the case today: https://reviews.llvm.org/D121447#3376520
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Revision tags: llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3 |
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c7954ca3 |
| 01-Apr-2024 |
Shih-Po Hung <shihpo.hung@sifive.com> |
Recommit "[RISCV] Refine cost on Min/Max reduction (#79402)" (#86480)
This is recommitted as the test and fix for
llvm.vector.reduce.fmaximum/fminimum are covered in #80553 and #80697
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Revision tags: llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2 |
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59e55906 |
| 01-Feb-2024 |
Philip Reames <preames@rivosinc.com> |
Revert "[RISCV] Refine cost on Min/Max reduction" (#80340)
Reverts llvm/llvm-project#79402. Crash reported. On closer inspection,
this patch does not handle Intrinsic::maximum and Intrinsic::minimu
Revert "[RISCV] Refine cost on Min/Max reduction" (#80340)
Reverts llvm/llvm-project#79402. Crash reported. On closer inspection,
this patch does not handle Intrinsic::maximum and Intrinsic::minimum.
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| #
2800448f |
| 30-Jan-2024 |
Shih-Po Hung <shihpo.hung@sifive.com> |
[RISCV] Refine cost on Min/Max reduction (#79402)
This patch is split off from #77342, and follows #79103
- Correct for CodeSize cost that 1 instruction is not included. 3 is
from {VMV.S, Reduct
[RISCV] Refine cost on Min/Max reduction (#79402)
This patch is split off from #77342, and follows #79103
- Correct for CodeSize cost that 1 instruction is not included. 3 is
from {VMV.S, ReductionOp, VMV.X}
- Add SplitCost which chains a series of VMAX/VMIN/... which scales with
LMUL.
- Use MVT to estimate VL.
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Revision tags: llvmorg-18.1.0-rc1 |
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bf716fb7 |
| 26-Jan-2024 |
Shih-Po Hung <shihpo.hung@sifive.com> |
[RISCV] Refine cost on Min/Max reduction with i1 type (#79401)
It is split off from #77342.
InstCombine transform min/max reduction with i1 into arithmetic
reduction,
so this patch reuses the cos
[RISCV] Refine cost on Min/Max reduction with i1 type (#79401)
It is split off from #77342.
InstCombine transform min/max reduction with i1 into arithmetic
reduction,
so this patch reuses the cost logic in arithmetic reduction cost
function.
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Revision tags: llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2 |
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0a5d52a7 |
| 25-Sep-2023 |
Sergey Kachkov <109674256+skachkov-sc@users.noreply.github.com> |
[RISCV][CostModel] Add getCFInstrCost RISC-V implementation (#65599)
This patch implements getCFInstrCost TTI hook that mostly affects
LoopVectorizer decisions. It sets zero cost for PHI nodes and
[RISCV][CostModel] Add getCFInstrCost RISC-V implementation (#65599)
This patch implements getCFInstrCost TTI hook that mostly affects
LoopVectorizer decisions. It sets zero cost for PHI nodes and zero
throughput cost for branches (assuming that branches are likely to
be predicted). The implementation is similar to X86/AArch64/PowerPC
targets and reduces loop cost by excluding induction PHIs/loop latch
branches, which in turn leads to selecting smaller vectorization
factor.
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Revision tags: llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init |
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fb661e25 |
| 19-Jan-2023 |
ShihPo Hung <shihpo.hung@sifive.com> |
[CostModel][RISCV] Model code size cost for reduction
Since code-size cost doesn't scale linearly with LMUL, this change is to separate it from throughput.
Reviewed By: reames
Differential Revisio
[CostModel][RISCV] Model code size cost for reduction
Since code-size cost doesn't scale linearly with LMUL, this change is to separate it from throughput.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D142068
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Revision tags: llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3 |
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4178e334 |
| 10-Aug-2022 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[CostModel] Update RUN -passes=* to double quotes to appease update scripts on windows
DOS really doesn't like `` quotes to be used in command lines
Some prep work as I'm intending to resurrect D79
[CostModel] Update RUN -passes=* to double quotes to appease update scripts on windows
DOS really doesn't like `` quotes to be used in command lines
Some prep work as I'm intending to resurrect D79483 soon
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Revision tags: llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6 |
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536095a2 |
| 10-Jun-2022 |
Philip Reames <preames@rivosinc.com> |
[RISCV] Refine costs for i1 reductions
Our actual lowering for i1 reductions uses ctpop combined with possibly a vector negate and possibly a logic op afterwards. I believe ctpop to be low cost on a
[RISCV] Refine costs for i1 reductions
Our actual lowering for i1 reductions uses ctpop combined with possibly a vector negate and possibly a logic op afterwards. I believe ctpop to be low cost on all reasonable hardware.
The default costing implementation here was returning quite inconsistent costs. and/or were returning very high costs (because we seem to think moving into scalar registers is very expensive?) and others were returning lower but still too high (because of the assumed tree reduce strategy). While we should probably improve the generic costing strategy for i1 vectors, let's start by fixing the immediate problem.
Differential Revision: https://reviews.llvm.org/D127511
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2247e4de |
| 10-Jun-2022 |
Philip Reames <preames@rivosinc.com> |
[RISCV] Use common prefixes to reduce duplication in cost model tests
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2b83467d |
| 10-Jun-2022 |
Philip Reames <preames@rivosinc.com> |
[RISCV] Broaden cost model coverage for fixed vectors w/i1 element type
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Revision tags: llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4 |
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| #
ae7c6647 |
| 11-Mar-2022 |
Yeting Kuo <yeting.kuo@sifive.com> |
[RISCV] Add basic code modeling for fixed length vector reduction.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D121447
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