[InstCombine] Drop Range attribute when simplifying 'fshl' based on demanded bits (#124429)

When simplifying operands based on demanded bits, the return value range
of llvm.fshl might change. Keepi

[InstCombine] Drop Range attribute when simplifying 'fshl' based on demanded bits (#124429)

When simplifying operands based on demanded bits, the return value range
of llvm.fshl might change. Keeping the Range attribute might cause
llvm.fshl to generate a poison and lead to miscompile. Drop the Range
attribute similar to `dropPosonGeneratingFlags` elsewhere.

Fix #124387

show more ...

[InstCombine] Fold `(X * (Y << K)) u>> K -> X * Y` when highbits are not demanded (#111151)

Alive2: https://alive2.llvm.org/ce/z/Z7QgjH

[InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794)

Closes https://github.com/llvm/llvm-project/issues/116775.

[InstCombine] add control for SimplifyDemandedVectorElts depth limit (#113717)

Allows customizing the depth of the recursive search on vectors that
InstCombine does when looking for unused elements

[InstCombine] add control for SimplifyDemandedVectorElts depth limit (#113717)

Allows customizing the depth of the recursive search on vectors that
InstCombine does when looking for unused elements.

We find it helpful to be able to customize this for compile time
reasons.

show more ...

[NFC] Rename `Intrinsic::getDeclaration` to `getOrInsertDeclaration` (#111752)

Rename the function to reflect its correct behavior and to be consistent
with `Module::getOrInsertFunction`. This is a

[NFC] Rename `Intrinsic::getDeclaration` to `getOrInsertDeclaration` (#111752)

Rename the function to reflect its correct behavior and to be consistent
with `Module::getOrInsertFunction`. This is also in preparation of
adding a new `Intrinsic::getDeclaration` that will have behavior similar
to `Module::getFunction` (i.e, just lookup, no creation).

show more ...

[InstCombine] Avoid crash on aggregate types in SimplifyDemandedUseFPClass (#111128)

The disables folding for FP aggregates that are not poison/posZero
types, which is currently not supported. Note

[InstCombine] Avoid crash on aggregate types in SimplifyDemandedUseFPClass (#111128)

The disables folding for FP aggregates that are not poison/posZero
types, which is currently not supported. Note: To fully handle this
aggregates would also likely require teaching `computeKnownFPClass()` to
handle array and struct constants (which does not seem implemented
outside of zero init).

show more ...

[InstCombine] Canonicalize `sub mask, X -> ~X` when high bits are ignored (#110635)

Alive2: https://alive2.llvm.org/ce/z/NJgBPL

The motivating case of this patch is to emit `andn` on RISC-V with

[InstCombine] Canonicalize `sub mask, X -> ~X` when high bits are ignored (#110635)

Alive2: https://alive2.llvm.org/ce/z/NJgBPL

The motivating case of this patch is to emit `andn` on RISC-V with zbb
for expressions like `(sub 63, X) & 63`.

show more ...

[InstCombine] Fix SimplifyDemandedBits recursion cutoff for Arguments

There was a discrepancy between how SimplifyDemandedBits and
computeKnownBits handled the Argument case. computeKnownBits()
woul

[InstCombine] Fix SimplifyDemandedBits recursion cutoff for Arguments

There was a discrepancy between how SimplifyDemandedBits and
computeKnownBits handled the Argument case. computeKnownBits()
would use information from range attributes even once the
recursion limit has been reached.

Fixes https://github.com/llvm/llvm-project/issues/110631.

show more ...

InstCombine/Demanded: simplify srem case (NFC) (#110260)

The srem case of SimplifyDemandedUseBits partially duplicates
KnownBits::srem. It is guarded by a statement that takes the absolute
value o

InstCombine/Demanded: simplify srem case (NFC) (#110260)

The srem case of SimplifyDemandedUseBits partially duplicates
KnownBits::srem. It is guarded by a statement that takes the absolute
value of the RHS and checks whether it is a power of 2, but the abs()
call here useless, since an srem with a negative RHS is flipped into one
with a positive RHS, adjusting LHS appropriately. Stripping the abs call
allows us to call KnownBits::srem instead of partially duplicating it.

show more ...

[InstCombine] Fall through to computeKnownBits() for sdiv by -1

When dividing by -1 we were breaking out of the code entirely,
while we should fall through to computeKnownBits().

This fixes an inst

[InstCombine] Fall through to computeKnownBits() for sdiv by -1

When dividing by -1 we were breaking out of the code entirely,
while we should fall through to computeKnownBits().

This fixes an instcombine-verify-known-bits discrepancy.

Fixes https://github.com/llvm/llvm-project/issues/109957.

show more ...

[KnownBits] Add KnownBits::add and KnownBits::sub helper wrappers. (#99468)

[InstCombine] Fixing wrong select folding in vectors with undef elements (#102244)

This PR fixes https://github.com/llvm/llvm-project/issues/98435.
`SimplifyDemandedVectorElts` mishandles the undef

[InstCombine] Fixing wrong select folding in vectors with undef elements (#102244)

This PR fixes https://github.com/llvm/llvm-project/issues/98435.
`SimplifyDemandedVectorElts` mishandles the undef by assuming that
!isNullValue() means the condition is true.

By preventing any value that we're not certain equals 1 or 0, it avoids
having to make any particular choice by not demanding bits from a
particular branch with potentially picking a wrong value.

Proof: https://alive2.llvm.org/ce/z/r8CmEu

show more ...

[PatternMatch] Use `m_SpecificCmp` matchers. NFC. (#100878)

Compile-time improvement:
http://llvm-compile-time-tracker.com/compare.php?from=13996378d81c8fa9a364aeaafd7382abbc1db83a&to=861ffa4ec5f7b

[PatternMatch] Use `m_SpecificCmp` matchers. NFC. (#100878)

Compile-time improvement:
http://llvm-compile-time-tracker.com/compare.php?from=13996378d81c8fa9a364aeaafd7382abbc1db83a&to=861ffa4ec5f7bde5a194a7715593a1b5359eb581&stat=instructions:u
baseline: 803eaf29267c6aae9162d1a83a4a2ae508b440d3
```
Top 5 improvements:
stockfish/movegen.ll 2541620819 2538599412 -0.12%
minetest/profiler.cpp.ll 431724935 431246500 -0.11%
abc/luckySwap.c.ll 581173720 580581935 -0.10%
abc/kitTruth.c.ll 2521936288 2519445570 -0.10%
abc/extraUtilTruth.c.ll 1216674614 1215495502 -0.10%
Top 5 regressions:
openssl/libcrypto-shlib-sm4.ll 1155054721 1155943201 +0.08%
openssl/libcrypto-lib-sm4.ll 1155054838 1155943063 +0.08%
spike/vsm4r_vv.ll 1296430080 1297039258 +0.05%
spike/vsm4r_vs.ll 1312496906 1313093460 +0.05%
nuttx/lib_rand48.c.ll 126201233 126246692 +0.04%
Overall: -0.02112308%
```

show more ...

[InstCombine] Turn AShr into LShr more often in SimplifyDemandedUseBits (#99155)

The functional change here is to undo "llvm-svn: 311773", aka D36936,
aka commit 22178dd33b3460207b8. That patch avoi

[InstCombine] Turn AShr into LShr more often in SimplifyDemandedUseBits (#99155)

The functional change here is to undo "llvm-svn: 311773", aka D36936,
aka commit 22178dd33b3460207b8. That patch avoided to convert AShr
into LShr in SimplifyDemandedUseBits based on known sign bits
analysis. Even if it would be legal to turn the shift into a
logical shift (given by the fact that the shifted in bits wasn't
demanded), that patch prevented converting the shift into LShr when
any of the original sign bits were demanded.
One side effect of the reverted functionalty was that the better we
were at computing number of sign bits, the less likely it was that
we would replace AShr by LShr during SimplifyDemandedUseBits. This
was seen in https://github.com/llvm/llvm-project/pull/97693/ when
an improvement of ComputeNumSignBits resulted in regressions due
to no longer rewriting AShr to LShr.
The test case from D36936 still passes after this commit. So it seems
like at least the compiler has been taught how to optimize that
scenario even if we do the AShr->LShr transform more aggressively.

show more ...

[InstCombine] Fix typo in `adjustKnownBitsForSelectArm` (#98155)

Fixes https://github.com/llvm/llvm-project/issues/98139.

[InstCombine] Remove root special case in demanded bits simplification

When calling SimplifyDemandedBits (as opposed to
SimplifyDemandedInstructionBits), and there are multiple uses,
always use Simp

[InstCombine] Remove root special case in demanded bits simplification

When calling SimplifyDemandedBits (as opposed to
SimplifyDemandedInstructionBits), and there are multiple uses,
always use SimplifyMultipleUseDemandedBits and drop the special
case for root values.

This fixes the ephemeral value detection, as seen by the restored
assumes in tests. It may result in more or less simplification,
depending on whether we get more out of having demanded bits or
the ability to perform non-multi-use transforms. The change in
the phi-known-bits.ll test is because the icmp operand now gets
simplified based on demanded bits, which then prevents a different
known bits simplification later.

This also makes the code safe against future changes like
https://github.com/llvm/llvm-project/pull/97289, which add more
context that would have to be discarded for the multi-use case.

show more ...

Reapply [InstCombine] Fix context for multi-use demanded bits simplification

Repplied with a clang test fix.

-----

When simplifying a multi-use root value, the demanded bits were
reset to full, bu

Reapply [InstCombine] Fix context for multi-use demanded bits simplification

Repplied with a clang test fix.

-----

When simplifying a multi-use root value, the demanded bits were
reset to full, but we also need to reset the context instruction.
To make this convenient (without requiring by-value passing of
SimplifyQuery), move the logic that handles constants and
dispatches to SimplifyDemandedUseBits/SimplifyMultipleUseDemandedBits
into SimplifyDemandedBits. The SimplifyDemandedInstructionBits
caller starts with full demanded bits and an appropriate context
anyway.

The different context instruction does mean that the ephemeral
value protection no longer triggers in some cases, as the changes
to assume tests show.

An alternative, which I will explore in a followup, is to always
use SimplifyMultipleUseDemandedBits() -- the previous root special
case is only really intended for SimplifyDemandedInstructionBits(),
which now no longer shares this code path.

Fixes https://github.com/llvm/llvm-project/issues/97330.

show more ...

Revert "[InstCombine] Fix context for multi-use demanded bits simplification"

This reverts commit b558ac0eef57a3737b1e27844115fa91e0b32582.

This breaks a clang test, reverting for now.

[InstCombine] Fix context for multi-use demanded bits simplification

When simplifying a multi-use root value, the demanded bits were
reset to full, but we also need to reset the context extract. To

[InstCombine] Fix context for multi-use demanded bits simplification

When simplifying a multi-use root value, the demanded bits were
reset to full, but we also need to reset the context extract. To
make this convenient (without requiring by-value passing of
SimplifyQuery), move the logic that that handles constants and
dispatches to SimplifyDemandedUseBits/SimplifyMultipleUseDemandedBits
into SimplifyDemandedBits. The SimplifyDemandedInstructionBits
caller starts with full demanded bits and an appropriate context
anyway.

The different context instruction does mean that the ephemeral
value protection no longer triggers in some cases, as the changes
to assume tests show.

An alternative, which I will explore in a followup, is to always
use SimplifyMultipleUseDemandedBits() -- the previous root special
case is only really intended for SimplifyDemandedInstructionBits(),
which now no longer shares this code path.

Fixes https://github.com/llvm/llvm-project/issues/97330.

show more ...

[InstCombine] Sync KnownBits logic for select arms

Extract an adjustKnownBitsForSelectArm() helper for the
ValueTracking logic and make use of it in SimplifyDemandedBits().

This fixes a consistency

[InstCombine] Sync KnownBits logic for select arms

Extract an adjustKnownBitsForSelectArm() helper for the
ValueTracking logic and make use of it in SimplifyDemandedBits().

This fixes a consistency violation under instcombine-verify-known-bits.

show more ...

[InstCombine] Use KnownBits::ashr()

This fixes a consistency violation under -instcombine-verify-known-bits.

[InstCombine] Pass SimplifyQuery to SimplifyDemandedBits()

This will enable calling SimplifyDemandedBits() with a SimplifyQuery
that has CondContext set in the future.

Additionally this also margin

[InstCombine] Pass SimplifyQuery to SimplifyDemandedBits()

This will enable calling SimplifyDemandedBits() with a SimplifyQuery
that has CondContext set in the future.

Additionally this also marginally strengthens the analysis by
retaining the original context instruction for one-use chains.

show more ...

[InstCombine] Relax one-use requirement for add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN (#90509)

Since these remove instructions as long as at least one of X or Y is
one-use, we don't ne

[InstCombine] Relax one-use requirement for add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN (#90509)

Since these remove instructions as long as at least one of X or Y is
one-use, we don't need to check one-use for both.

show more ...

[InstCombine] Fix funnel shift bailout in demanded bits simplification

We shouldn't simply return here -- we still need to compute the
known bits and fall through to generic handling.

This fixes a

[InstCombine] Fix funnel shift bailout in demanded bits simplification

We shouldn't simply return here -- we still need to compute the
known bits and fall through to generic handling.

This fixes a -instcombine-verify-known-bits violation in funnel.ll.

show more ...

[InstCombine] Remove redundant urem demanded bits case

This does the recursive simplification with all bits demanded,
which is not useful. Fall through to the fallback case instead.