[ARM][AArch64] Introduce the Armv9.6-A architecture version (#110825)

This introduces the Armv9.6-A architecture version, including the
relevant command-line option for -march.

More details abou

[ARM][AArch64] Introduce the Armv9.6-A architecture version (#110825)

This introduces the Armv9.6-A architecture version, including the
relevant command-line option for -march.

More details about the Armv9.6-A architecture version can be found at:
* https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2024
* https://developer.arm.com/documentation/ddi0602/2024-09/

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Update FEAT_PAuth_LR behaviour for AArch64 (#90614)

Currently, LLVM enables `-mbranch-protection=standard` as `bti+pac-ret`.
To align LLVM with the behaviour in GNU, this has been updated to
`bti+

Update FEAT_PAuth_LR behaviour for AArch64 (#90614)

Currently, LLVM enables `-mbranch-protection=standard` as `bti+pac-ret`.
To align LLVM with the behaviour in GNU, this has been updated to
`bti+pac-ret+pc` when FEAT_PAuth_LR is enabled as an optional feature
via the `-mcpu=` options. If this is not enabled, then this will revert
to the existing behaviour.

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[AArch64] Add missing field 'GuardedControlStack' initializer (NFC)

llvm-project/llvm/lib/TargetParser/ARMTargetParserCommon.cpp:143:39:
error: missing field 'GuardedControlStack' initializer [-Wer

[AArch64] Add missing field 'GuardedControlStack' initializer (NFC)

llvm-project/llvm/lib/TargetParser/ARMTargetParserCommon.cpp:143:39:
error: missing field 'GuardedControlStack' initializer [-Werror,-Wmissing-field-initializers]
PBP = {"none", "a_key", false, false};
^
1 error generated.

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[clang][AArch64] Add a -mbranch-protection option to enable GCS (#75486)

-mbranch-protection=gcs (enabled by -mbranch-protection=standard) causes
generated objects to be marked with the gcs feature

[clang][AArch64] Add a -mbranch-protection option to enable GCS (#75486)

-mbranch-protection=gcs (enabled by -mbranch-protection=standard) causes
generated objects to be marked with the gcs feature. This is done via
the guarded-control-stack module flag, in a similar way to
branch-target-enforcement and sign-return-address.

Enabling GCS causes the GNU_PROPERTY_AARCH64_FEATURE_1_GCS bit to be set
on generated objects. No code generation changes are required, as GCS
just requires that functions are called using BL and returned from using
RET (or other similar variant instructions), which is already the case.

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Re-land "[AArch64] Codegen support for FEAT_PAuthLR" (#75947)

This reverts commit 9f0f5587426a4ff24b240018cf8bf3acc3c566ae.

Fix expensive checks failure by properly marking register def for ADR.

Revert "[AArch64] Codegen support for FEAT_PAuthLR"

This reverts commit 5992ce90b8c0fac06436c3c86621fbf6d5398ee5.

Builtbot failures with expensive checks enabled.

[AArch64] Codegen support for FEAT_PAuthLR

- Adds a new +pc option to -mbranch-protection that will enable
the use of PC as a diversifier in PAC branch protection code.

- When +pauth-lr is enable

[AArch64] Codegen support for FEAT_PAuthLR

- Adds a new +pc option to -mbranch-protection that will enable
the use of PC as a diversifier in PAC branch protection code.

- When +pauth-lr is enabled (-march=armv9.5a+pauth-lr) in combination
with -mbranch-protection=pac-ret+pc, the new 9.5-a instructions
(pacibsppc, retaasppc, etc) are used.

Documentation for the relevant instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/

Co-authored-by: Lucas Prates <lucas.prates@arm.com>

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[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.

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[AArch64] Introduce the Armv9.5-A architecture version (#72392)

This introduces the Armv9.5-A architecture version, including the
relevant command-line option for -march.

Mode details about the

[AArch64] Introduce the Armv9.5-A architecture version (#72392)

This introduces the Armv9.5-A architecture version, including the
relevant command-line option for -march.

Mode details about the Armv9.5-A architecture version can be found at:
*
https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2023
* https://developer.arm.com/documentation/ddi0602/2023-09/

Patch by Oliver Stannard.

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[Support] Move TargetParsers to new component

This is a fairly large changeset, but it can be broken into a few
pieces:
- `llvm/Support/*TargetParser*` are all moved from the LLVM Support
componen

[Support] Move TargetParsers to new component

This is a fairly large changeset, but it can be broken into a few
pieces:
- `llvm/Support/*TargetParser*` are all moved from the LLVM Support
component into a new LLVM Component called "TargetParser". This
potentially enables using tablegen to maintain this information, as
is shown in https://reviews.llvm.org/D137517. This cannot currently
be done, as llvm-tblgen relies on LLVM's Support component.
- This also moves two files from Support which use and depend on
information in the TargetParser:
- `llvm/Support/Host.{h,cpp}` which contains functions for inspecting
the current Host machine for info about it, primarily to support
getting the host triple, but also for `-mcpu=native` support in e.g.
Clang. This is fairly tightly intertwined with the information in
`X86TargetParser.h`, so keeping them in the same component makes
sense.
- `llvm/ADT/Triple.h` and `llvm/Support/Triple.cpp`, which contains
the target triple parser and representation. This is very intertwined
with the Arm target parser, because the arm architecture version
appears in canonical triples on arm platforms.
- I moved the relevant unittests to their own directory.

And so, we end up with a single component that has all the information
about the following, which to me seems like a unified component:
- Triples that LLVM Knows about
- Architecture names and CPUs that LLVM knows about
- CPU detection logic for LLVM

Given this, I have also moved `RISCVISAInfo.h` into this component, as
it seems to me to be part of that same set of functionality.

If you get link errors in your components after this patch, you likely
need to add TargetParser into LLVM_LINK_COMPONENTS in CMake.

Differential Revision: https://reviews.llvm.org/D137838

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