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Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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dfe43bd1 |
| 09-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[X86] Remove unused includes (NFC) (#115593)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2 |
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08ddbab8 |
| 15-Oct-2024 |
Phoebe Wang <phoebe.wang@intel.com> |
[X86][AMX] Fix missing stride register for tileloadd (#110226)
Fixes: #110190
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Revision tags: llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8 |
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e5c93ed3 |
| 06-Jun-2024 |
Phoebe Wang <phoebe.wang@intel.com> |
[X86][AMX] Checking AMXProgModel in X86LowerTileCopy (#94358)
This fixes compile time regression after #93692.
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Revision tags: llvmorg-18.1.7 |
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8aa33f16 |
| 03-Jun-2024 |
Phoebe Wang <phoebe.wang@intel.com> |
[X86][AMX] Check also AMX register live out for copy lowering (#93692)
Another bug fix for #83628.
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Revision tags: llvmorg-18.1.6 |
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b576a6b0 |
| 15-May-2024 |
Phoebe Wang <phoebe.wang@intel.com> |
[X86][AMX] Fix a bug after #83628 (#91207)
We need to check if `GR64Cand` a valid register before using it.
Test is not needed since it's covered in llvm-test-suite.
Fixes #90954
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Revision tags: llvmorg-18.1.5 |
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42bc4f69 |
| 24-Apr-2024 |
Phoebe Wang <phoebe.wang@intel.com> |
Reland "[X86] X86LowerTileCopy: Find dead register to use to prevent save-reload of tile register (#83628)"
Fixes compile time regression in previous commit.
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e32c4dfe |
| 21-Apr-2024 |
Nikita Popov <npopov@redhat.com> |
Revert "[X86] X86LowerTileCopy: Find dead register to use to prevent save-reload of tile register (#83628)"
This reverts commit 34acbb3801515f9f41cc2d790d26072eb004ac46.
This change causes major co
Revert "[X86] X86LowerTileCopy: Find dead register to use to prevent save-reload of tile register (#83628)"
This reverts commit 34acbb3801515f9f41cc2d790d26072eb004ac46.
This change causes major compile-time regressions.
show more ...
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34acbb38 |
| 21-Apr-2024 |
AtariDreams <gfunni234@gmail.com> |
[X86] X86LowerTileCopy: Find dead register to use to prevent save-reload of tile register (#83628)
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Revision tags: llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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dd6fec5d |
| 22-Jan-2024 |
XinWang10 <108658776+XinWang10@users.noreply.github.com> |
[X86][APX]Support lowering for APX promoted AMX-TILE instructions (#78689)
The enc/dec of promoted AMX-TILE instructions have been supported in
https://github.com/llvm/llvm-project/pull/76210.
Thi
[X86][APX]Support lowering for APX promoted AMX-TILE instructions (#78689)
The enc/dec of promoted AMX-TILE instructions have been supported in
https://github.com/llvm/llvm-project/pull/76210.
This patch support lowering for promoted AMX-TILE instructions and
integrate test to existing tests.
show more ...
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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2c4ba3e9 |
| 05-Nov-2021 |
Kazu Hirata <kazu@google.com> |
[Target] Use make_early_inc_range (NFC)
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2 |
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8f48ddd1 |
| 20-Feb-2021 |
Luo, Yuanke <yuanke.luo@intel.com> |
[X86][AMX] Lower tile copy instruction.
Since there is no tile copy instruction, we need to store tile
register to stack and load from stack to another tile register.
We need extra GR to hold the st
[X86][AMX] Lower tile copy instruction.
Since there is no tile copy instruction, we need to store tile
register to stack and load from stack to another tile register.
We need extra GR to hold the stride, and we need stack slot to
hold the tile data register. We would run this pass after copy
propagation, so that we don't miss copy optimization. And we
would run this pass before prolog/epilog insertion, so that we
can allocate stack slot.
Differential Revision: https://reviews.llvm.org/D97112
show more ...
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