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Revision tags: llvmorg-21-init |
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4a486e77 |
| 19-Jan-2025 |
Craig Topper <craig.topper@sifive.com> |
[CodeGen] Use Register/MCRegister::isPhysical. NFC
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Revision tags: llvmorg-19.1.7 |
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e3030819 |
| 20-Dec-2024 |
Fangrui Song <i@maskray.me> |
[X86] Remove redundant initialize*Pass in ctor
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Revision tags: llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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dfe43bd1 |
| 09-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[X86] Remove unused includes (NFC) (#115593)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1 |
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e4ceb5a7 |
| 22-Mar-2023 |
Luo, Yuanke <yuanke.luo@intel.com> |
[X86] Create extra prolog/epilog for stack realignment
Fix some bugs and reland e4c1dfed38370b4 and 614c63bec6d67c.
1. Run argument stack rebase pass before the reserved physical register
is fina
[X86] Create extra prolog/epilog for stack realignment
Fix some bugs and reland e4c1dfed38370b4 and 614c63bec6d67c.
1. Run argument stack rebase pass before the reserved physical register
is finalized.
2. Add LEA pseudo instruction to prevent the instruction being
eliminated.
3. Don't support X32.
show more ...
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3e2d4e85 |
| 21-Mar-2023 |
Luo, Yuanke <yuanke.luo@intel.com> |
Revert "[X86] Create extra prolog/epilog for stack realignment [part 2]"
This reverts commit 614c63bec6d67cbfdc17b50e443ff769a28c18d0.
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614c63be |
| 21-Mar-2023 |
Luo, Yuanke <yuanke.luo@intel.com> |
[X86] Create extra prolog/epilog for stack realignment [part 2]
This patch is to support D145650 for elf target as well.
Differential Revision: https://reviews.llvm.org/D146489
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Revision tags: llvmorg-16.0.0, llvmorg-16.0.0-rc4 |
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e4c1dfed |
| 09-Mar-2023 |
Luo, Yuanke <yuanke.luo@intel.com> |
[X86] Create extra prolog/epilog for stack realignment
The base pointer register is reserved by compiler when there is
dynamic size alloca and stack realign in a function. However the
base pointer r
[X86] Create extra prolog/epilog for stack realignment
The base pointer register is reserved by compiler when there is
dynamic size alloca and stack realign in a function. However the
base pointer register is not defined in X86 ABI, so user can use
this register in inline assembly. The inline assembly would
clobber base pointer register without being awared by user. This
patch is to create extra prolog to save the stack pointer to a
scratch register and use this register to reference argument from
stack. For some calling convention (e.g. regcall), there may be
few scratch register.
Below is the example code for such case.
```
extern int bar(void *p);
long long foo(size_t size, char c, int id) {
__attribute__((__aligned__(64))) int a;
char *p = (char *)alloca(size);
asm volatile ("nop"::"S"(405):);
asm volatile ("movl %0, %1"::"r"(id), "m"(a):);
p[2] = 8;
memset(p, c, size);
return bar(p);
}
```
And below prolog/epilog will be emit for this case.
```
leal 4(%esp), %ebx
.cfi_def_cfa %ebx, 0
andl $-128, %esp
pushl -4(%ebx)
...
leal 4(%ebx), %esp
.cfi_def_cfa %esp, 4
```
Differential Revision: https://reviews.llvm.org/D145650
show more ...
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