Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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4162a9bc |
| 08-Dec-2023 |
Craig Topper <craig.topper@sifive.com> |
[RISCV] Cleanup pass initialization.
Remove redundant initializations from pass constructors that were already being initialized by LLVMInitializeRISCVTarget().
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4 |
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44d4f975 |
| 21-Oct-2023 |
Craig Topper <craig.topper@sifive.com> |
[RISCV] Replace RISCV -> RISC-V in comments. NFC
I did this once previously, but more uses have crept in.
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Revision tags: llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init |
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71299921 |
| 27-Jun-2023 |
Alex Bradbury <asb@igalia.com> |
[RISCV][NFC] Adjust RISCVMoveMerge.cpp header to match standard style
* 80 columns * Fix name of file (RISCVMoveMerger.cpp vs RISCVMoveMerge.cpp) * `//===--` prefix rather than center-aligned text.
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c9e08fa6 |
| 21-Jun-2023 |
WuXinlong <821408745@qq.com> |
[RISCV] Add a pass to merge moving parameter registers instructions for Zcmp
This patch adds a pass to generate `cm.mvsa01` & `cm.mva01s`.
RISCVMoveOptimizer.cpp which combines two mv inst into one
[RISCV] Add a pass to merge moving parameter registers instructions for Zcmp
This patch adds a pass to generate `cm.mvsa01` & `cm.mva01s`.
RISCVMoveOptimizer.cpp which combines two mv inst into one cm.mva01s or cm.mva01s.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D150415
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