History log of /llvm-project/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp (Results 1 – 25 of 385)
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Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6
# a13ec9cd 09-Dec-2024 Lei Huang <lei@ca.ibm.com>

[PowerPC] Update data layout aligment of i128 to 16 (#118004)

Fix 64-bit PowerPC part of
https://github.com/llvm/llvm-project/issues/102783.


# 935bbbbd 03-Dec-2024 Zaara Syeda <syzaara@ca.ibm.com>

[PPC] Remove missed cases of ppc-merge-string-pool (#117626)

PPCMergeStringPool was replaced with GlobalMerge with commit aaa37d6.
Some cases of option ppc-merge-string-pool were missed being remov

[PPC] Remove missed cases of ppc-merge-string-pool (#117626)

PPCMergeStringPool was replaced with GlobalMerge with commit aaa37d6.
Some cases of option ppc-merge-string-pool were missed being removed.

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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4
# eec21cce 15-Nov-2024 Matin Raayai <raayaiardakani.m@northeastern.edu>

Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets (#116290)

This PR fixes a set of build issues with experimental targets happened
in result of merging #111234 to mast

Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets (#116290)

This PR fixes a set of build issues with experimental targets happened
in result of merging #111234 to master.

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# bb3f5e1f 14-Nov-2024 Matin Raayai <30674652+matinraayai@users.noreply.github.com>

Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)

Following discussions in #110443, and the following earlier discussions
in https://lists.llvm.org/pipermail/llvm-dev/2017-October/

Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)

Following discussions in #110443, and the following earlier discussions
in https://lists.llvm.org/pipermail/llvm-dev/2017-October/117907.html,
https://reviews.llvm.org/D38482, https://reviews.llvm.org/D38489, this
PR attempts to overhaul the `TargetMachine` and `LLVMTargetMachine`
interface classes. More specifically:
1. Makes `TargetMachine` the only class implemented under
`TargetMachine.h` in the `Target` library.
2. `TargetMachine` contains target-specific interface functions that
relate to IR/CodeGen/MC constructs, whereas before (at least on paper)
it was supposed to have only IR/MC constructs. Any Target that doesn't
want to use the independent code generator simply does not implement
them, and returns either `false` or `nullptr`.
3. Renames `LLVMTargetMachine` to `CodeGenCommonTMImpl`. This renaming
aims to make the purpose of `LLVMTargetMachine` clearer. Its interface
was moved under the CodeGen library, to further emphasis its usage in
Targets that use CodeGen directly.
4. Makes `TargetMachine` the only interface used across LLVM and its
projects. With these changes, `CodeGenCommonTMImpl` is simply a set of
shared function implementations of `TargetMachine`, and CodeGen users
don't need to static cast to `LLVMTargetMachine` every time they need a
CodeGen-specific feature of the `TargetMachine`.
5. More importantly, does not change any requirements regarding library
linking.

cc @arsenm @aeubanks

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# f71cb9db 14-Nov-2024 Kazu Hirata <kazu@google.com>

[PowerPC] Remove unused includes (NFC) (#116163)

Identified with misc-include-cleaner.


# aaa37d67 12-Nov-2024 Zaara Syeda <syzaara@ca.ibm.com>

[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)

Enable merging all constants without looking at use in GlobalMerge by
default to replace PPCMergeStringPool pass on Linux.


# ccddd136 31-Oct-2024 Zaara Syeda <syzaara@ca.ibm.com>

Enable aggressive constant merge in GlobalMerge for AIX (#113956)

Enable merging all constants without looking at use in GlobalMerge by
default to replace PPCMergeStringPool pass on AIX.


Revision tags: llvmorg-19.1.3
# 488d3924 16-Oct-2024 Christudasan Devadasan <christudasan.devadasan@amd.com>

[CodeGen][NewPM] Port EarlyIfConversion pass to NPM. (#108508)


Revision tags: llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4
# 8e901c25 27-Aug-2024 Kai Luo <gluokai@gmail.com>

[PowerPC] Retire PPCExpandISel pass (#84289)

We can decide whether to expand isel or not in instruction selection
pass and early-if-conversion pass. The transformation implemented in
PPCExpandISel

[PowerPC] Retire PPCExpandISel pass (#84289)

We can decide whether to expand isel or not in instruction selection
pass and early-if-conversion pass. The transformation implemented in
PPCExpandISel can be retired considering PPC backend doesn't generate
`isel` instructions post-RA.
Also if we are seeking performant branch-or-isel decision, we can turn
to selectoptimize pass.

---------

Co-authored-by: Kai Luo <lkail@cn.ibm.com>

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Revision tags: llvmorg-19.1.0-rc3
# 93253819 15-Aug-2024 Amy Kwan <amy.kwan1@ibm.com>

[PowerPC][GlobalMerge] Enable GlobalMerge by default on AIX (#101226)

This patch turns on the GlobalMerge pass by default on AIX and updates
LIT tests accordingly.


# 5e990b0b 14-Aug-2024 Amy Kwan <amy.kwan1@ibm.com>

[PowerPC][GlobalMerge] Reduce TOC usage by merging internal and private global data (#101224)

This patch aims to reduce TOC usage by merging internal and private
global data.

Moreover, we also a

[PowerPC][GlobalMerge] Reduce TOC usage by merging internal and private global data (#101224)

This patch aims to reduce TOC usage by merging internal and private
global data.

Moreover, we also add the GlobalMerge pass within the PPCTargetMachine
pipeline, which is disabled by default. This transformation can be
enabled by -ppc-global-merge.

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Revision tags: llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7
# 7652a594 04-Jun-2024 paperchalice <liujunchang97@outlook.com>

Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)

- Fix build with `EXPENSIVE_CHECKS`
- Remove unused `PassName::ID` to resolve warning
- Mark `~SelectionDAGISel` virt

Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)

- Fix build with `EXPENSIVE_CHECKS`
- Remove unused `PassName::ID` to resolve warning
- Mark `~SelectionDAGISel` virtual so AArch64 backend can work properly

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# 8917afaf 02-Jun-2024 paperchalice <liujunchang97@outlook.com>

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

This reverts commit de37c06f01772e02465ccc9f538894c76d89a7a1 to
de37c06f01772e02465ccc9f538894c76d89a7a1

It still b

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

This reverts commit de37c06f01772e02465ccc9f538894c76d89a7a1 to
de37c06f01772e02465ccc9f538894c76d89a7a1

It still breaks EXPENSIVE_CHECKS build. Sorry.

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# d2cdc8ab 02-Jun-2024 paperchalice <liujunchang97@outlook.com>

[NewPM][CodeGen] Port selection dag isel to new pass manager (#83567)

Port selection dag isel to new pass manager.
Only `AMDGPU` and `X86` support new pass version. `-verify-machineinstrs` in new p

[NewPM][CodeGen] Port selection dag isel to new pass manager (#83567)

Port selection dag isel to new pass manager.
Only `AMDGPU` and `X86` support new pass version. `-verify-machineinstrs` in new pass manager belongs to verify instrumentation, it is enabled by default.

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Revision tags: llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4
# fe42e72d 25-Feb-2024 Rishabh Bali <rishabhsbali@gmail.com>

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

Port the `atomicexpand` pass to the new Pass Manager.
Fixes #64559


Revision tags: llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init
# 586ecdf2 12-Dec-2023 Kazu Hirata <kazu@google.com>

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.

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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3
# 5e4ec53b 16-Oct-2023 Arthur Eubanks <aeubanks@google.com>

[llc][PPC] Move PIC check into TargetMachine (#66727)

Matches other code like the code model checking.


Revision tags: llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0
# 0a1aa6cd 14-Sep-2023 Arthur Eubanks <aeubanks@google.com>

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future chang

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.

This matches other nearby enums.

For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::

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# 0a4a8bec 07-Sep-2023 stefanp-ibm <57511600+stefanp-ibm@users.noreply.github.com>

[PowerPC] Turn string pooling on by default. (#65628)

This patch turns the string pooling pass on by default. Some tests are
updated as required.


# 84e2fd7e 07-Sep-2023 Stefan Pintilie <stefanp@ca.ibm.com>

[PowerPC] Add a pass to merge all of the constant global arrays into one pool.

On PowerPC the number of TOC entries must be kept low for large
applications. In order to reduce the number of constant

[PowerPC] Add a pass to merge all of the constant global arrays into one pool.

On PowerPC the number of TOC entries must be kept low for large
applications. In order to reduce the number of constant global arrays
we can pool them into one structure and then access them as the base
address of that structure plus some offset. The constant global arrays
may be arrays of `i8` which are constant strings but they may also be
arrays of `i32, i64, etc...`.

Reviewed By: lei, amyk

Differential Revision: https://reviews.llvm.org/D155730

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Revision tags: llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2
# 8d2e9fc8 18-Apr-2023 David Tenty <daltenty@ibm.com>

[PowerPC] Add function pointer alignment to DataLayout

The alignment of function pointers was added to the Datalayout by
D57335 but currently is unset for the Power target. This will cause us
to com

[PowerPC] Add function pointer alignment to DataLayout

The alignment of function pointers was added to the Datalayout by
D57335 but currently is unset for the Power target. This will cause us
to compute a conservative minimum alignment of one if places like
Value::getPointerAlignment.

This patch implements the function pointer alignment in the Datalayout
for the Power backend and Power targets in clang, so we can query the
value for a particular Power target.

We come up with the correct value one of two ways:

- If the target uses function descriptor objects (i.e. ELFv1 & AIX ABIs),
then a function pointer points to the descriptor, so use the alignment
we would emit the descriptor with.
- If the target doesn't use function descriptor objects (i.e. ELFv2), a
function pointer points to the global entry point, so use the minimum
alignment for code on Power (i.e. 4-bytes).

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D147016

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Revision tags: llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3
# 4b09cb2b 20-Feb-2023 Brad Smith <brad@comstyle.com>

[PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI

Add a member function isPPC64ELFv2ABI() to determine what ABI is used on the
64-bit PowerPC big endian operating environment.

Re

[PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI

Add a member function isPPC64ELFv2ABI() to determine what ABI is used on the
64-bit PowerPC big endian operating environment.

Reviewed By: nemanjai, dim, pkubaj

Differential Revision: https://reviews.llvm.org/D144321

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# 2a58be42 13-Feb-2023 Samuel Parker <sam.parker@arm.com>

[HardwareLoops] NewPM support.

With the NPM, we're now defaulting to preserving LCSSA, so a couple
of tests have changed slightly.

Differential Revision: https://reviews.llvm.org/D140982


Revision tags: llvmorg-16.0.0-rc2
# 62c7f035 07-Feb-2023 Archibald Elliott <archibald.elliott@arm.com>

[NFC][TargetParser] Remove llvm/ADT/Triple.h

I also ran `git clang-format` to get the headers in the right order for
the new location, which has changed the order of other headers in two
files.


Revision tags: llvmorg-16.0.0-rc1, llvmorg-17-init
# 6809af1a 13-Jan-2023 Dominik Adamski <dominik.adamski@amd.com>

Revert "[OpenMP][OMPIRBuilder] Move SIMD alignment calculation to LLVM Frontend"

This reverts commit ed01de67433174d3157e9d239d59dd465d52c6a5.


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