History log of /llvm-project/llvm/lib/Target/DirectX/DirectX.h (Results 1 – 15 of 15)
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Revision tags: llvmorg-21-init, llvmorg-19.1.7
# 0fca76d5 18-Dec-2024 Justin Bogner <mail@justinbogner.com>

[DirectX] Introduce the DXILResourceAccess pass (#116726)

This pass transforms resource access via `llvm.dx.resource.getpointer`
into buffer loads and stores.

Fixes #114848.


Revision tags: llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4
# 5ac624c8 13-Nov-2024 Farzon Lotfi <1802579+farzonl@users.noreply.github.com>

[DirectX] Flatten arrays (#114332)

- Relevant piece is `DXILFlattenArrays.cpp`
- Loads and Store Instruction visits are just for finding
GetElementPtrConstantExpr and splitting them.
- Allocas

[DirectX] Flatten arrays (#114332)

- Relevant piece is `DXILFlattenArrays.cpp`
- Loads and Store Instruction visits are just for finding
GetElementPtrConstantExpr and splitting them.
- Allocas needed to be replaced with flattened allocas.
- Global arrays were similar to allocas. Only interesting piece here is
around initializers.
- Most of the work went into building correct GEP chains. The approach
here was a recursive strategy via `recursivelyCollectGEPs`.
- All intermediary GEPs get marked for deletion and only the leaf GEPs
get updated with the new index.

fixes [89646](https://github.com/llvm/llvm-project/issues/89646)

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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1
# 324bdd66 26-Sep-2024 Farzon Lotfi <1802579+farzonl@users.noreply.github.com>

[DirectX] Data Scalarization of Vectors in Global Scope (#110029)

This change adds a pass to scalarize vectors in global scope into
arrays.

There are three distinct parts
1. find the globals th

[DirectX] Data Scalarization of Vectors in Global Scope (#110029)

This change adds a pass to scalarize vectors in global scope into
arrays.

There are three distinct parts
1. find the globals that need to be updated and define what the new type
should be
2. initialize that new type and copy over all the right attributes over
from the old type.
3. Use the instruction visitor pattern to update the loads, stores, and
geps for the layout of the new data structure.

resolves https://github.com/llvm/llvm-project/issues/107920

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Revision tags: llvmorg-19.1.0, llvmorg-19.1.0-rc4
# 81ee3855 20-Aug-2024 Justin Bogner <mail@justinbogner.com>

[DirectX] Register a few DXIL passes with the new PM

This wires up dxil-op-lower, dxil-intrinsic-expansion, dxil-translate-metadata,
and dxil-pretty-printer to the new pass manager, both as a matter

[DirectX] Register a few DXIL passes with the new PM

This wires up dxil-op-lower, dxil-intrinsic-expansion, dxil-translate-metadata,
and dxil-pretty-printer to the new pass manager, both as a matter of future
proofing the backend and so that they can be used more flexibly in tests.

A few arbitrary tests are updated in order to test the new PM path, and we drop
the "print-dxil-resource-md" pass since it's redundant with the pretty printer.

Pull Request: https://github.com/llvm/llvm-project/pull/104250

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Revision tags: llvmorg-19.1.0-rc3
# db279c72 16-Aug-2024 Helena Kotas <hekotas@microsoft.com>

[HLSL] Change default linkage of HLSL functions to internal (#95331)

An HLSL function has internal linkage by default unless it is:
1. shader entry point function
2. marked with the `export` keywo

[HLSL] Change default linkage of HLSL functions to internal (#95331)

An HLSL function has internal linkage by default unless it is:
1. shader entry point function
2. marked with the `export` keyword
(https://github.com/llvm/llvm-project/issues/92812)
3. patch constant function (not implemented yet)

This PR adds a link-time pass `DXILFinalizeLinkage` that updates the
linkage of functions to make sure only shader entry points and exported
functions are visible from the module (have _program linkage_). All
other functions will be updated to have internal linkage.

Related spec update: microsoft/hlsl-specs#295

Fixes #llvm/llvm-project#92071

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Revision tags: llvmorg-19.1.0-rc2
# 1c5f6cfc 01-Aug-2024 Justin Bogner <mail@justinbogner.com>

[DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD*. NFC

These passes will be replaced soon as we move to the target extension based
resource handling in the DirectX backend, b

[DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD*. NFC

These passes will be replaced soon as we move to the target extension based
resource handling in the DirectX backend, but removing them now before the
replacement stuff is all up and running would be very disruptive. However, we
do need to move these passes out of the way to avoid symbol conflicts with the
new DXILResourceAnalysis in the Analysis library.

Note: I tried an even simpler hack in #100698 but it doesn't really work. A
rename is the most expedient path forward here.

Pull Request: https://github.com/llvm/llvm-project/pull/101393

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Revision tags: llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2
# de1a97db 15-Mar-2024 Farzon Lotfi <1802579+farzonl@users.noreply.github.com>

[DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (#84526)

This change implements lowering for #70076, #70100, #70072, & #70102
`CGBuiltin.cpp` - - simplify `lerp` intrinsic
`IntrinsicsDire

[DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (#84526)

This change implements lowering for #70076, #70100, #70072, & #70102
`CGBuiltin.cpp` - - simplify `lerp` intrinsic
`IntrinsicsDirectX.td` - simplify `lerp` intrinsic
`SemaChecking.cpp` - remove unnecessary check
`DXILIntrinsicExpansion.*` - add intrinsic to instruction expansion
cases
`DXILOpLowering.cpp` - make sure `DXILIntrinsicExpansion` happens first
`DirectX.h` - changes to support new pass
`DirectXTargetMachine.cpp` - changes to support new pass

Why `any`, and `lerp` as instruction expansion just for DXIL?
- SPIR-V there is an
[OpAny](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpAny)
- SPIR-V has a GLSL lerp extension via
[Fmix](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#FMix)

Why `exp` instruction expansion?
- We have an `exp2` opcode and `exp` reuses that opcode. So instruction
expansion is a convenient way to do preprocessing.
- Further SPIR-V has a GLSL exp extension via
[Exp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp)
and
[Exp2](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp2)

Why `rcp` as instruction expansion?
This one is a bit of the odd man out and might have to move to
`cgbuiltins` when we better understand SPIRV requirements. However I
included it because it seems like [fast math mode has an AllowRecip
flag](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_fp_fast_math_mode)
which lets you compute the reciprocal without performing the division.
We don't have that in DXIL so thought to include it.

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Revision tags: llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4
# 6e05c8df 18-Oct-2022 Chris Bieneman <chris.bieneman@me.com>

[DX] Create globals for DXContainer parts

DXContainer files have a handful of sections that need to be written.
This adds a pass to write the section data into IR globals, and writes
the shader flag

[DX] Create globals for DXContainer parts

DXContainer files have a handful of sections that need to be written.
This adds a pass to write the section data into IR globals, and writes
the shader flag data into a global.

The test cases here verify that the shader flags are correctly written
from the IR into the global and emitted to the DXContainer.

This change also fixes a bug in the MCDXContainerWriter, where the size
of the dxbc::ProgramHeader was not being included in the part offset
calcuations. This is verified to be working by the new testcases where
obj2yaml can properly dump part data for parts after the DXIL part.

Resolves issue #57742 (https://github.com/llvm/llvm-project/issues/57742)

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D135793

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Revision tags: llvmorg-15.0.3
# e530a118 13-Oct-2022 Chris Bieneman <chris.bieneman@me.com>

[DX] Add pass to pretty-print DXIL metadata in asm

When DXC prints IR output it adds a bunch of IR comments in a header
that describe the DXIL metadata in a more human-readable format. This
pass wil

[DX] Add pass to pretty-print DXIL metadata in asm

When DXC prints IR output it adds a bunch of IR comments in a header
that describe the DXIL metadata in a more human-readable format. This
pass will serve that purpose for LLVM by printing out ahead of the IR
printer.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D135802

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Revision tags: working
# 22018555 04-Oct-2022 Xiang Li <python3kgae@outlook.com>

[DirectX backend] Add analysis to collect DXILResources

Now only DXILTranslateMetadata uses DXILResources, so DXILResourceWrapper is only used by DXILTranslateMetadata.
Once we add lower for createH

[DirectX backend] Add analysis to collect DXILResources

Now only DXILTranslateMetadata uses DXILResources, so DXILResourceWrapper is only used by DXILTranslateMetadata.
Once we add lower for createHandle, DXILResourceWrapper will be used in more passes.
Also we can add resource index allocation in DXILResourceWrapper.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D135190

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Revision tags: llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4
# d401a993 10-May-2022 Chris Bieneman <chris.bieneman@me.com>

[DirectX] Embed DXIL in LLVM Module

At the end of the codegen pipeline for DXIL we will emit the DXIL into
a global variable in the Module annotated for the "DXIL" section.

This will be used by the

[DirectX] Embed DXIL in LLVM Module

At the end of the codegen pipeline for DXIL we will emit the DXIL into
a global variable in the Module annotated for the "DXIL" section.

This will be used by the MCDXContainerStreamer to emit the DXIL into a
DXContainer DXIL part.

Other parts of the DXContainer will be constructed similarly by
serializing their values into GlobalVariables.

This will allow DXIL to flow into DXContainers through the normal
MCStreamer flow used in the MC layer.

Depends on D122270

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D125334

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# 0c7f7f1b 07-May-2022 python3kgae <python3kgae@outlook.com>

[DirectX backend] Add pass to emit dxil metadata.

A new pass DxilEmitMetadata is added to translate information saved in llvm ir into metadata to match DXIL spec.

Only generate DXIL validator versi

[DirectX backend] Add pass to emit dxil metadata.

A new pass DxilEmitMetadata is added to translate information saved in llvm ir into metadata to match DXIL spec.

Only generate DXIL validator version in this PR.

In llvm ir, validator version is saved in ModuleFlag with "dx.valver" as Key.

!llvm.module.flags = !{!0, !1}
!1 = !{i32 6, !"dx.valver", !2}
!2 = !{i32 1, i32 1}

DXIL validator version has major and minor versions that are specified as named metadata:

!dx.valver = !{!2}
!2 = !{i32 1, i32 7}

Reviewed By: kuhar, beanz

Differential Revision: https://reviews.llvm.org/D125158

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# 85285be9 02-May-2022 Xiang Li <python3kgae@outlook.com>

[DirectX backend] Add pass to lower llvm intrinsic into dxil op function.

A new pass DXILOpLowering was added.
It will scan all llvm intrinsics, create dxil op function if it can map to dxil op func

[DirectX backend] Add pass to lower llvm intrinsic into dxil op function.

A new pass DXILOpLowering was added.
It will scan all llvm intrinsics, create dxil op function if it can map to dxil op function.
Then translate call instructions on the intrinsic into call on dxil op function.
dxil op function will add i32 argument to the begining of args for dxil opcode.
So cannot use setCalledFunction to update the call instruction on intrinsic.

This commit only support sin to start the work.

Reviewed By: kuhar, beanz

Differential Revision: https://reviews.llvm.org/D124805

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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2
# f2526c1a 14-Apr-2022 Chris Bieneman <chris.bieneman@me.com>

Add DXIL Bitcode Writer and DXIL testing

This change is a big blob of code that isn't easy to break up. It
either comes in all together as a blob, works and has tests, or it
doesn't do anything.

Lo

Add DXIL Bitcode Writer and DXIL testing

This change is a big blob of code that isn't easy to break up. It
either comes in all together as a blob, works and has tests, or it
doesn't do anything.

Logically you can think of this patch as three things:
(1) Adding virtual interfaces so the bitcode writer can be overridden
(2) Adding a new bitcode writer implementation for DXIL
(3) Adding some (optional) crazy CMake goop to build the
DirectXShaderCompiler's llvm-dis as dxil-dis for testing

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D122082

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Revision tags: llvmorg-14.0.1
# 6599fdab 23-Mar-2022 Chris Bieneman <chris.bieneman@me.com>

Add DXILPrepare CodeGen pass

The DXIL Prepare pass handles the IR mutations required to convert
modern LLVM IR into something that more closely resembles LLVM-3.7 IR
so that the DXIL bitcode writer

Add DXILPrepare CodeGen pass

The DXIL Prepare pass handles the IR mutations required to convert
modern LLVM IR into something that more closely resembles LLVM-3.7 IR
so that the DXIL bitcode writer can emit 3.7 IR.

This change adds the codegen pass handling the first two IR
transformations:

* stripping new function attributes
* converting fneg into fsub

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D122081

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