Revision tags: llvmorg-21-init |
|
#
de4bbbfd |
| 28-Jan-2025 |
SivanShani-Arm <sivan.shani@arm.com> |
[Build Attributes] Standardize names according to convention. (#124556)
The de-facto convention for build attributes file and class names seems
to be 'Attrs' in the class name and 'Attributes' in t
[Build Attributes] Standardize names according to convention. (#124556)
The de-facto convention for build attributes file and class names seems
to be 'Attrs' in the class name and 'Attributes' in the file name.
Accordingly, change file ARMBuildAttrs.cpp -> ARMBuildAttributes.cpp And
class AArch64BuildAttrs --> AArch64BuildAttributes
show more ...
|
#
ee99c4d4 |
| 23-Jan-2025 |
SivanShani-Arm <sivan.shani@arm.com> |
[LLVM][Clang][AArch64] Implement AArch64 build attributes (#123990)
- Added support for AArch64-specific build attributes.
- Print AArch64 build attributes to assembly.
- Emit AArch64 build attrib
[LLVM][Clang][AArch64] Implement AArch64 build attributes (#123990)
- Added support for AArch64-specific build attributes.
- Print AArch64 build attributes to assembly.
- Emit AArch64 build attributes to ELF.
Specification: https://github.com/ARM-software/abi-aa/pull/230
show more ...
|
#
b40739a6 |
| 22-Jan-2025 |
Kazu Hirata <kazu@google.com> |
Revert "[LLVM][Clang][AArch64] Implement AArch64 build attributes (#118771)"
This reverts commit d7fb4a275c98f4035d1083b5eb3edd2ffb2da00e.
Buildbots failing: https://lab.llvm.org/buildbot/#/builder
Revert "[LLVM][Clang][AArch64] Implement AArch64 build attributes (#118771)"
This reverts commit d7fb4a275c98f4035d1083b5eb3edd2ffb2da00e.
Buildbots failing: https://lab.llvm.org/buildbot/#/builders/169/builds/7671 https://lab.llvm.org/buildbot/#/builders/65/builds/11046
show more ...
|
#
d7fb4a27 |
| 22-Jan-2025 |
SivanShani-Arm <sivan.shani@arm.com> |
[LLVM][Clang][AArch64] Implement AArch64 build attributes (#118771)
- Added support for AArch64-specific build attributes.
- Print AArch64 build attributes to assembly.
- Parse AArch64 build attri
[LLVM][Clang][AArch64] Implement AArch64 build attributes (#118771)
- Added support for AArch64-specific build attributes.
- Print AArch64 build attributes to assembly.
- Parse AArch64 build attributes from assembly.
- Emit AArch64 build attributes to ELF.
Specification:
https://github.com/ARM-software/abi-aa/pull/230
show more ...
|
Revision tags: llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
|
#
a41922ad |
| 11-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[AArch64] Remove unused includes (NFC) (#115685)
Identified with misc-include-cleaner.
|
Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4 |
|
#
46707b0a |
| 22-Aug-2024 |
Fangrui Song <i@maskray.me> |
[AArch64,ELF] Allow implicit $d/$x at section beginning
The start state of a new section is `EMS_None`, often leading to a $d/$x at offset 0. Introduce a MCTargetOption/cl::opt "implicit-mapsyms" to
[AArch64,ELF] Allow implicit $d/$x at section beginning
The start state of a new section is `EMS_None`, often leading to a $d/$x at offset 0. Introduce a MCTargetOption/cl::opt "implicit-mapsyms" to allow an alternative behavior (https://github.com/ARM-software/abi-aa/issues/274):
* Set the start state to `EMS_Data` or `EMS_A64`. * For text sections, add an ending $x only if the final data is not instructions. * For non-text sections, add an ending $d only if the final data is not data commands.
``` .section .text.1,"ax" nop // emit $d .long 42 // emit $x
.section .text.2,"ax" nop ```
This new behavior decreases the .symtab size significantly:
``` % bloaty a64-2/bin/clang -- a64-0/bin/clang FILE SIZE VM SIZE -------------- -------------- -5.4% -1.13Mi [ = ] 0 .strtab -50.9% -4.09Mi [ = ] 0 .symtab -4.0% -5.22Mi [ = ] 0 TOTAL ```
---
This scheme works as long as the user can rule out some error scenarios:
* .text.1 assembled using the traditional behavior is combined with .text.2 using the new behavior * A linker script combining non-text sections and text sections. The lack of mapping symbols in the non-text sections could make them treated as code, unless the linker inserts extra mapping symbols.
The above mix-and-match scenarios aren't an issue at all for a significant portion of users.
A text section may start with data commands in rare cases (e.g. -fsanitize=function) that many users don't care about. When combing `(.text.0; .word 0)` and `(.text.1; .word 0)`, the ending $x of .text.0 and the initial $d of .text.1 may have the same address. If both sections reside in the same file, ensure the ending symbol comes before the initial $d of .text.1, so that a dumb linker respecting the symbol order will place the ending $x before the initial $d.
Disassemblers using stable sort will see both symbols at the same address, and the second will win.
When section ordering mechanisms (e.g. --symbol-ordering-file, --call-graph-profile-sort, `.text : { second.o(.text) first.o(.text) }`) are involved, the initial data in a text section following a text section with trailing data could be misidentified as code, but the issue is local and the risk could be acceptable.
Pull Request: https://github.com/llvm/llvm-project/pull/99718
show more ...
|
Revision tags: llvmorg-19.1.0-rc3 |
|
#
8d8f56da |
| 17-Aug-2024 |
Fangrui Song <i@maskray.me> |
[MC,AArch64] Remove unneeded STT_NOTYPE/STB_LOCAL code for mapping symbols and improve tests
|
Revision tags: llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
|
#
4010ddf7 |
| 22-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC,AArch64] Create mapping symbols with non-unique names
Add `createLocalSymbol` to create a local, non-temporary symbol. Different from `createRenamableSymbol`, the `Used` bit is ignored, therefor
[MC,AArch64] Create mapping symbols with non-unique names
Add `createLocalSymbol` to create a local, non-temporary symbol. Different from `createRenamableSymbol`, the `Used` bit is ignored, therefore multiple local symbols might share the same name.
Utilizing `createLocalSymbol` in AArch64 allows for efficient mapping symbol creation with non-unique names, saving .strtab space. The behavior matches GNU assembler.
Pull Request: https://github.com/llvm/llvm-project/pull/99836
show more ...
|
#
7f017f0a |
| 21-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Drop unnecessary MCSymbol::setExternal calls for ELF
Similar to e4c360a897fe062914519d331e8f1e28b2b1fbfd (2020).
|
#
8f14e39e |
| 21-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove unnecessary isVerboseAsm from Target::AsmTargetStreamerCtorTy
The parameter is confusing as it duplicates MCStreamer::isVeboseAsm (initialized from MCTargetOptions::AsmVerbose). After 23
[MC] Remove unnecessary isVerboseAsm from Target::AsmTargetStreamerCtorTy
The parameter is confusing as it duplicates MCStreamer::isVeboseAsm (initialized from MCTargetOptions::AsmVerbose). After 233cca169237b91d16092c82bd55ee6a283afe98, no in-tree target uses the parameter.
show more ...
|
#
55a7be55 |
| 19-Jul-2024 |
Fangrui Song <i@maskray.me> |
[AArch64,ELF] Use getCurrentSection().first in changeSection
Similar to the NVPTX change 4ae23bcca144b542f16d45acc8f270e156e2fa4e. And improve the tests.
|
#
fec1b6f9 |
| 24-Jun-2024 |
Fangrui Song <i@maskray.me> |
[MC] Move ELFWriter::createMemtagRelocs to AArch64TargetELFStreamer::finish
Follow-up to https://reviews.llvm.org/D128958
* Move target-specific code away from the generic ELFWriter. * All sections
[MC] Move ELFWriter::createMemtagRelocs to AArch64TargetELFStreamer::finish
Follow-up to https://reviews.llvm.org/D128958
* Move target-specific code away from the generic ELFWriter. * All sections should have been created before MCAssembler::layout. * Remove one `registerSection` use, which should be considered private to MCAssembler.
show more ...
|
#
5997e7d7 |
| 24-Jun-2024 |
Fangrui Song <i@maskray.me> |
Revert "[MC] Move ELFWriter::createMemtagRelocs to AArch64ELFStreamer::finishImpl"
This reverts commit 9d63506ddc6d60e220d967eb11779114075d401d.
There is a heap-use-after-free.
|
#
9d63506d |
| 23-Jun-2024 |
Fangrui Song <i@maskray.me> |
[MC] Move ELFWriter::createMemtagRelocs to AArch64ELFStreamer::finishImpl
Follow-up to https://reviews.llvm.org/D128958
* Move target-specific code away from the generic ELFWriter. * All sections s
[MC] Move ELFWriter::createMemtagRelocs to AArch64ELFStreamer::finishImpl
Follow-up to https://reviews.llvm.org/D128958
* Move target-specific code away from the generic ELFWriter. * All sections should have been created before MCAssembler::layout. * Remove one `registerSection` use, which should be considered private to MCAssembler.
show more ...
|
#
95f983f8 |
| 23-Jun-2024 |
Fangrui Song <i@maskray.me> |
[MC] Change Subsection parameters from const MCExpr * to uint32_t
Follow-up to 05ba5c0648ae5e80d5afce270495bf3b1eef9af4. uint32_t is preferred over const MCExpr * in the section stack uses because i
[MC] Change Subsection parameters from const MCExpr * to uint32_t
Follow-up to 05ba5c0648ae5e80d5afce270495bf3b1eef9af4. uint32_t is preferred over const MCExpr * in the section stack uses because it should only be evaluated once. Change the paramter type to match.
show more ...
|
Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5 |
|
#
4e340356 |
| 25-Apr-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove RelaxAll parameters from create*Streamer
Related to clean-up opportunities discussed at #90013.
After these cleanups, the `RelaxAll` parameter from `createMCObjectStreamer` can be remov
[MC] Remove RelaxAll parameters from create*Streamer
Related to clean-up opportunities discussed at #90013.
After these cleanups, the `RelaxAll` parameter from `createMCObjectStreamer` can be removed as well. As `createMCObjectStreamer` is a more user-facing API and used by two files in mlir/, we postpone the cleanup to the future.
show more ...
|
#
45b59cb1 |
| 25-Apr-2024 |
Fangrui Song <i@maskray.me> |
[MC] Move setRelaxAll() calls to MCObjectStreamer
Related to clean-up opportunities discussed at #90013.
|
Revision tags: llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6 |
|
#
825e4ae7 |
| 16-Nov-2023 |
Billy Laws <blaws05@gmail.com> |
[AArch64][Windows] Add MC support for ec_context (#69520)
ARM64EC uses the same CONTEXT structure as x86_64 as opposed to the
regular ARM64 context, a new unwind MSFT_OP_EC_CONTEXT is added to
han
[AArch64][Windows] Add MC support for ec_context (#69520)
ARM64EC uses the same CONTEXT structure as x86_64 as opposed to the
regular ARM64 context, a new unwind MSFT_OP_EC_CONTEXT is added to
handle this.
show more ...
|
Revision tags: llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2 |
|
#
62c7f035 |
| 07-Feb-2023 |
Archibald Elliott <archibald.elliott@arm.com> |
[NFC][TargetParser] Remove llvm/ADT/Triple.h
I also ran `git clang-format` to get the headers in the right order for the new location, which has changed the order of other headers in two files.
|
Revision tags: llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4 |
|
#
d6481dc8 |
| 18-Oct-2022 |
Eli Friedman <efriedma@quicinc.com> |
[AArch64][Windows] Add MC support for save_any_reg.
Representing this as 12 separate operations is a bit ugly, but trying to represent the different modes using a bitfield seemed worse.
Differentia
[AArch64][Windows] Add MC support for save_any_reg.
Representing this as 12 separate operations is a bit ugly, but trying to represent the different modes using a bitfield seemed worse.
Differential Revision: https://reviews.llvm.org/D135417
show more ...
|
Revision tags: llvmorg-15.0.3 |
|
#
918f6f58 |
| 12-Oct-2022 |
Martin Storsjö <martin@martin.st> |
[AArch64] [SEH] Rename pac_sign_return_address to pac_sign_lr
This new opcode was initially documented as "pac_sign_return_address" in https://github.com/MicrosoftDocs/cpp-docs/pull/4202, but was so
[AArch64] [SEH] Rename pac_sign_return_address to pac_sign_lr
This new opcode was initially documented as "pac_sign_return_address" in https://github.com/MicrosoftDocs/cpp-docs/pull/4202, but was soon afterwards renamed into "pac_sign_lr" in https://github.com/MicrosoftDocs/cpp-docs/pull/4209, as the other name was unwieldy, and there were no other external references to that name anywhere.
Rename our external .seh assembler directive - it hasn't been merged for very long yet, so there's probably no external use to account for.
Rename all other internal references to the opcode similarly.
Differential Revision: https://reviews.llvm.org/D135762
show more ...
|
Revision tags: working |
|
#
c43bff64 |
| 05-Oct-2022 |
Martin Storsjö <martin@martin.st> |
[AArch64] Add support for the SEH opcode for return address signing
This was documented upstream in https://github.com/MicrosoftDocs/cpp-docs/pull/4202.
Differential Revision: https://reviews.llvm.
[AArch64] Add support for the SEH opcode for return address signing
This was documented upstream in https://github.com/MicrosoftDocs/cpp-docs/pull/4202.
Differential Revision: https://reviews.llvm.org/D135276
show more ...
|
Revision tags: llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
|
#
cfbd5c8e |
| 29-Mar-2022 |
Fangrui Song <i@maskray.me> |
[AArch64] Allow .variant_pcs before the symbol is registered
glibc sysdeps/aarch64/tst-vpcs-mod.S has something like: ``` .variant_pcs vpcs_call .global vpcs_call ```
This is supported by GNU as
[AArch64] Allow .variant_pcs before the symbol is registered
glibc sysdeps/aarch64/tst-vpcs-mod.S has something like: ``` .variant_pcs vpcs_call .global vpcs_call ```
This is supported by GNU as but leads to an error in MC. Use getOrCreateSymbol to support a not-yet-registered symbol: call `registerSymbol` to ensure the symbol exists even if there is no binding directive/label, to match GNU as.
While here, improve tests to check (1) a local symbol can get STO_AARCH64_VARIANT_PCS (2) undefined .variant_pcs (3) an alias does not inherit STO_AARCH64_VARIANT_PCS.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D122507
show more ...
|
Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
|
#
262dd1e4 |
| 02-Dec-2021 |
Kazu Hirata <kazu@google.com> |
[llvm] Use range-based for loops (NFC)
|
Revision tags: llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init |
|
#
57503524 |
| 12-Jul-2021 |
Fangrui Song <i@maskray.me> |
[AArch64] De-capitalize some Emit* functions
AsmParser/AsmPrinter/Streamer are mostly consistent on emit* functions now.
|