[AArch64] Correct position of CFI Instruction for Pointer Authentication (#121559)

As part #112171, support for FEAT_PAuthLR's CFI instructions was added.
However, the CFI instructions are emitted

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#121559)

As part #112171, support for FEAT_PAuthLR's CFI instructions was added.
However, the CFI instructions are emitted in the incorrect location. This
leads to incorrect CodeGen being generated and possible issues when
running a program. According to the ABI, the CFI instructions should be
emitted before the signing instruction. This is now done properly.

ABI information can be found here:
https://github.com/ARM-software/abi-aa/blob/bf0e2c8047c70987165f3e05e571d7836370ade9/aadwarf64/aadwarf64.rst#44call-frame-instructions

show more ...

[AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (#110705)

Move the emission of the checks performed on the authenticated LR value
during tail calls to AArch64AsmPrinter class,

[AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (#110705)

Move the emission of the checks performed on the authenticated LR value
during tail calls to AArch64AsmPrinter class, so that different checker
sequences can be reused by pseudo instructions expanded there.
This adds one more option to AuthCheckMethod enumeration, the generic
XPAC variant which is not restricted to checking the LR register.

show more ...

[AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (#112171)

As part of FEAT_PAuthLR, a new DWARF Frame Instruction was introduced,
`DW_CFA_AARCH64_negate_ra_state_with_pc`. This i

[AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (#112171)

As part of FEAT_PAuthLR, a new DWARF Frame Instruction was introduced,
`DW_CFA_AARCH64_negate_ra_state_with_pc`. This instructs Libunwind that
the PC has been used with the signing instruction. This change includes
three commits
- Libunwind support for the newly introduced DWARF Instruction
- CodeGen Support for the DWARF Instructions
- Reversing the changes made in #96377. Due to
`DW_CFA_AARCH64_negate_ra_state_with_pc`'s requirements to be placed
immediately after the signing instruction, this would mean the CFI
Instruction location was not consistent with the generated location when
not using FEAT_PAuthLR. The commit reverses the changes and makes the
location consistent across the different branch protection options.
While this does have a code size effect, this is a negligible one.

For the ABI information, see here:
https://github.com/ARM-software/abi-aa/blob/853286c7ab66048e4b819682ce17f567b77a0291/aadwarf64/aadwarf64.rst#id23

show more ...

[PAC] Sign LR with B key for non-leaf functions with ptrauth-returns attr (#100552)

For pauthtest ABI, there is a bunch of ptrauth-* options, including
ptrauth-returns. Use "ptrauth-returns" functi

[PAC] Sign LR with B key for non-leaf functions with ptrauth-returns attr (#100552)

For pauthtest ABI, there is a bunch of ptrauth-* options, including
ptrauth-returns. Use "ptrauth-returns" function attribute to indicate
need for LR signing with B key for non-leaf function to avoid using
"sign-return-address" and "sign-return-address-key" which were
originally designed for pac-ret.

Co-authored-by: Ahmed Bougacha <ahmed@bougacha.org>
Co-authored-by: Anatoly Trosinenko <atrosinenko@accesssoftek.com>

show more ...

CodeGen: Avoid some references to MachineFunction's getMMI (#99652)

MachineFunction's probably should not include a backreference to
the owning MachineModuleInfo. Most of these references were used

CodeGen: Avoid some references to MachineFunction's getMMI (#99652)

MachineFunction's probably should not include a backreference to
the owning MachineModuleInfo. Most of these references were used
just to query the MCContext, which MachineFunction already directly
stores. Other contexts are using it to query the LLVMContext, which
can already be accessed through the IR function reference.

show more ...

[AArch64][PAC] Reduce the size of synchronous CFI (#96377)

For synchronous unwind tables, the call frame information can be
slightly reduced by bundling the `.cfi_negate_ra_state` instruction with

[AArch64][PAC] Reduce the size of synchronous CFI (#96377)

For synchronous unwind tables, the call frame information can be
slightly reduced by bundling the `.cfi_negate_ra_state` instruction with
other CFI instructions in the prolog, saving 1 byte per function used
for `DW_CFA_advance_loc`.

This was suggested in
[D156428](https://reviews.llvm.org/D156428#4554317).

show more ...

[AArch64][PAC] Fix creating check instructions for BBs without an epilog (#92508)

`AArch64PAuth::checkAuthenticatedRegister()` splits the basic block
containing the tail call instruction to add che

[AArch64][PAC] Fix creating check instructions for BBs without an epilog (#92508)

`AArch64PAuth::checkAuthenticatedRegister()` splits the basic block
containing the tail call instruction to add check instructions, assuming
at least one more instruction before the call. This assumption is
incorrect in cases where some execution paths lead to the termination
block without creating the stack frame. This patch rearranges the
creation of the checks so that the prior splitting is not required.

show more ...

[AArch64][PAC][NFC] Make checkAuthenticatedRegister() return void (#92507)

The return value is not used. This change simplifies the upcoming fix

[AArch64][PAC] Refine authenticated pointer check methods (#74074)

Align the values of the immediate operand of BRK instruction with those
used by the existing arm64e implementation.

Make AuthCh

[AArch64][PAC] Refine authenticated pointer check methods (#74074)

Align the values of the immediate operand of BRK instruction with those
used by the existing arm64e implementation.

Make AuthCheckMethod::DummyLoad use the requested register
instead of LR.

show more ...

[AArch64][PAC] Expand blend(reg, imm) operation in aarch64-pauth pass (#74729)

In preparation for implementing code generation for more @llvm.ptrauth.* intrinsics, move the expansion of blend(regist

[AArch64][PAC] Expand blend(reg, imm) operation in aarch64-pauth pass (#74729)

In preparation for implementing code generation for more @llvm.ptrauth.* intrinsics, move the expansion of blend(register, small integer) variant of @llvm.ptrauth.blend to the AArch64PointerAuth pass, where most other PAuth-related code generation takes place.

show more ...

Re-land "[AArch64] Codegen support for FEAT_PAuthLR" (#75947)

This reverts commit 9f0f5587426a4ff24b240018cf8bf3acc3c566ae.

Fix expensive checks failure by properly marking register def for ADR.

Revert "[AArch64] Codegen support for FEAT_PAuthLR"

This reverts commit 5992ce90b8c0fac06436c3c86621fbf6d5398ee5.

Builtbot failures with expensive checks enabled.

[AArch64] Codegen support for FEAT_PAuthLR

- Adds a new +pc option to -mbranch-protection that will enable
the use of PC as a diversifier in PAC branch protection code.

- When +pauth-lr is enable

[AArch64] Codegen support for FEAT_PAuthLR

- Adds a new +pc option to -mbranch-protection that will enable
the use of PC as a diversifier in PAC branch protection code.

- When +pauth-lr is enabled (-march=armv9.5a+pauth-lr) in combination
with -mbranch-protection=pac-ret+pc, the new 9.5-a instructions
(pacibsppc, retaasppc, etc) are used.

Documentation for the relevant instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/

Co-authored-by: Lucas Prates <lucas.prates@arm.com>

show more ...

[AArch64][PAC] Refactor aarch64-ptrauth pass (#70446)

Refactor Pointer Authentication pass in preparation for adding more
PAUTH_* pseudo instructions:
* dropped early return from runOnMachineFunct

[AArch64][PAC] Refactor aarch64-ptrauth pass (#70446)

Refactor Pointer Authentication pass in preparation for adding more
PAUTH_* pseudo instructions:
* dropped early return from runOnMachineFunction() as other PAUTH_*
instructions need expansion even when pac-ret is disabled
* refactored runOnMachineFunction() to first collect all the
instructions of interest without modifying anything and then performing
changes in the later loops. There are two types of relevant
instructions: PAUTH_* pseudos that should definitely be replaced by this
pass and tail call instructions that may require attention if pac-ret is
enabled
* made the loop iterating over all of the instructions handle
instruction bundles by itself: even though this pass still does not
support bundled TCRETURN* instructions (such as produced by KCFI) it
does not crash anymore when no support is actually required

show more ...

Fix MSVC "not all control paths return a value" warnings. NFC.

[AArch64][PAC] Check authenticated LR value during tail call

When performing a tail call, check the value of LR register after
authentication to prevent the callee from signing and spilling an
untru

[AArch64][PAC] Check authenticated LR value during tail call

When performing a tail call, check the value of LR register after
authentication to prevent the callee from signing and spilling an
untrusted value. This commit implements a few variants of check,
more can be added later.

If it is safe to assume that executable pages are always readable,
LR can be checked just by dereferencing the LR value via LDR.

As an alternative, LR can be checked as follows:

; lowered AUT* instruction
; <some variant of check that LR contains a valid address>
b.cond break_block
ret_block:
; lowered TCRETURN
break_block:
brk 0xc471

As the existing methods either break the compatibility with execute-only
memory mappings or can degrade the performance, they are disabled by
default and can be explicitly enabled with a command line option.

Individual subtargets can opt-in to use one of the available methods
by updating AArch64FrameLowering::getAuthenticatedLRCheckMethod().

Reviewed By: kristof.beyls

Differential Revision: https://reviews.llvm.org/D156716

show more ...

[AArch64] Move PAuth codegen down the machine pipeline

To simplify handling PAuth in the machine outliner, introduce a
separate AArch64PointerAuth pass that is executed after both
Prologue/Epilogue

[AArch64] Move PAuth codegen down the machine pipeline

To simplify handling PAuth in the machine outliner, introduce a
separate AArch64PointerAuth pass that is executed after both
Prologue/Epilogue Inserter and Machine Outliner passes.

After moving to AArch64PointerAuth, signLR and authenticateLR are
not used outside of their class anymore, so make them private and
simplify accordingly.

The new pass is added via AArch64PassConfig::addPostBBSections(),
so that it can change the code size before branch relaxation occurs.
AArch64BranchTargets is placed there too, so it can take into account
any PACI(A|B)SP instructions and not excessively add BTIs at the start
of functions.

Reviewed By: tmatheson

Differential Revision: https://reviews.llvm.org/D159357

show more ...