Revision tags: llvmorg-21-init |
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3b67383c |
| 20-Jan-2025 |
Hervé Poussineau <hpoussin@reactos.org> |
[MC][Mips] Generate required IMAGE_REL_MIPS_PAIR relocation (#120876)
Add the required IMAGE_REL_MIPS_PAIR relocation after
IMAGE_REL_MIPS_REFHI/IMAGE_REL_MIPS_SECRELHI
Microsoft PE/COFF specifi
[MC][Mips] Generate required IMAGE_REL_MIPS_PAIR relocation (#120876)
Add the required IMAGE_REL_MIPS_PAIR relocation after
IMAGE_REL_MIPS_REFHI/IMAGE_REL_MIPS_SECRELHI
Microsoft PE/COFF specification says that the IMAGE_REL_MIPS_REFHI
relocation contains "the high 16 bits of the target's 32-bit virtual
address. [...] This relocation must be immediately followed by a PAIR
relocation whose SymbolTableIndex contains a 16-bit displacement which
is added to the upper 16 bits taken from the location being relocated."
Microsoft PE/COFF specification says that the IMAGE_REL_MIPS_SECRELHI
relocation contains "the high 16 bits of the 32-bit offset of the target
from the beginning of its section. A PAIR relocation must immediately
follow this on. The SymbolTableIndex of the PAIR relocation contains a
16-bit displacement, which is added to the upper 16 bits taken from the
location being relocated."
Behavior has been checked against Microsoft C compiler for MIPS.
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ac2165fe |
| 15-Jan-2025 |
Daniel Paoliello <danpao@microsoft.com> |
[coff] Don't try to write the obj if the assembler has errors (#123007)
The ASAN and MSAN tests have been failing after #122777 because some fields are now set in `executePostLayoutBinding` which is
[coff] Don't try to write the obj if the assembler has errors (#123007)
The ASAN and MSAN tests have been failing after #122777 because some fields are now set in `executePostLayoutBinding` which is skipped by the assembler if it had errors but read in `writeObject`
Since the compilation has failed anyway, skip `writeObject` if the assembler had errors.
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Revision tags: llvmorg-19.1.7 |
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283dca56 |
| 13-Jan-2025 |
Daniel Paoliello <danpao@microsoft.com> |
Reapply "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)" (#122777)
This reverts commit 2f7ade4b5e399962e18f5f9a0ab0b7335deece51.
Fi
Reapply "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)" (#122777)
This reverts commit 2f7ade4b5e399962e18f5f9a0ab0b7335deece51.
Fix is available in #122762
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2f7ade4b |
| 13-Jan-2025 |
Kirill Stoimenov <kstoimenov@google.com> |
Revert "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)"
Breaks sanitizer build: https://lab.llvm.org/buildbot/#/builders/52/builds/5
Revert "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)"
Breaks sanitizer build: https://lab.llvm.org/buildbot/#/builders/52/builds/5179
This reverts commits: 5ee0a71df919a328c714e25f0935c21e586cc18b d997a722c194feec5f3a94dec5acdce59ac5e55b
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5ee0a71d |
| 12-Jan-2025 |
Daniel Paoliello <danpao@microsoft.com> |
[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)
This change implements import call optimization for AArch64 Windows (equivalent to th
[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)
This change implements import call optimization for AArch64 Windows (equivalent to the undocumented MSVC `/d2ImportCallOptimization` flag).
Import call optimization adds additional data to the binary which can be used by the Windows kernel loader to rewrite indirect calls to imported functions as direct calls. It uses the same [Dynamic Value Relocation Table mechanism that was leveraged on x64 to implement `/d2GuardRetpoline`](https://techcommunity.microsoft.com/blog/windowsosplatform/mitigating-spectre-variant-2-with-retpoline-on-windows/295618).
The change to the obj file is to add a new `.impcall` section with the following layout: ```cpp // Per section that contains calls to imported functions: // uint32_t SectionSize: Size in bytes for information in this section. // uint32_t Section Number // Per call to imported function in section: // uint32_t Kind: the kind of imported function. // uint32_t BranchOffset: the offset of the branch instruction in its // parent section. // uint32_t TargetSymbolId: the symbol id of the called function. ```
NOTE: If the import call optimization feature is enabled, then the `.impcall` section must be emitted, even if there are no calls to imported functions.
The implementation is split across a few parts of LLVM: * During AArch64 instruction selection, the `GlobalValue` for each call to a global is recorded into the Extra Information for that node. * During lowering to machine instructions, the called global value for each call is noted in its containing `MachineFunction`. * During AArch64 asm printing, if the import call optimization feature is enabled: - A (new) `.impcall` directive is emitted for each call to an imported function. - The `.impcall` section is emitted with its magic header (but is not filled in). * During COFF object writing, the `.impcall` section is filled in based on each `.impcall` directive that were encountered.
The `.impcall` section can only be filled in when we are writing the COFF object as it requires the actual section numbers, which are only assigned at that point (i.e., they don't exist during asm printing).
I had tried to avoid using the Extra Information during instruction selection and instead implement this either purely during asm printing or in a `MachineFunctionPass` (as suggested in [on the forums](https://discourse.llvm.org/t/design-gathering-locations-of-instructions-to-emit-into-a-section/83729/3)) but this was not possible due to how loading and calling an imported function works on AArch64. Specifically, they are emitted as `ADRP` + `LDR` (to load the symbol) then a `BR` (to do the call), so at the point when we have machine instructions, we would have to work backwards through the instructions to discover what is being called. An initial prototype did work by inspecting instructions; however, it didn't correctly handle the case where the same function was called twice in a row, which caused LLVM to elide the `ADRP` + `LDR` and reuse the previously loaded address. Worse than that, sometimes for the double-call case LLVM decided to spill the loaded address to the stack and then reload it before making the second call. So, instead of trying to implement logic to discover where the value in a register came from, I instead recorded the symbol being called at the last place where it was easy to do: instruction selection.
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7b86fbba |
| 22-Dec-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove redundant MCSection::empty check. NFC
The section cannot be empty due to allocInitialFragment.
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Revision tags: llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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d73d5c8c |
| 15-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[MC] Remove unused includes (NFC) (#116317)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
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ae3c85a7 |
| 23-Jul-2024 |
Fangrui Song <i@maskray.me> |
MCAssembler: Move CGProfile to MCObjectWriter
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219d80bc |
| 23-Jul-2024 |
Fangrui Song <i@maskray.me> |
MCAssembler: Move FileNames and CompilerVersion to MCObjectWriter
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9539a779 |
| 21-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Export llvm::WinCOFFObjectWriter and access it from MCWinCOFFStreamer
Similar to commit 28fcafb50274be2520117eacb0a886adafefe59d (2011) for MachObjectWriter. MCWinCOFFStreamer can now access Wi
[MC] Export llvm::WinCOFFObjectWriter and access it from MCWinCOFFStreamer
Similar to commit 28fcafb50274be2520117eacb0a886adafefe59d (2011) for MachObjectWriter. MCWinCOFFStreamer can now access WinCOFFObjectWriter directly without holding object file format specific inforamtion in MCAssembler (e.g. IncrementalLinkerCompatible).
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b75453bc |
| 05-Jul-2024 |
Fangrui Song <i@maskray.me> |
MCAssembler: Remove unneeded non-const iterators for Sections and misleading size()
The pointers cannot be mutated even if the dereferenced MCSection can.
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fdd04e8c |
| 02-Jul-2024 |
Fangrui Song <i@maskray.me> |
WinCOFFObjectWriter: replace the MCAsmLayout parameter with MCAssembler
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dbf12b2f |
| 01-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove MCAsmLayout::{getSymbolOffset,getBaseSymbol}
The MCAsmLayout::* forwarders added by 67957a45ee1ec42ae1671cdbfa0d73127346cc95 have all been removed.
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a40ca78b |
| 01-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove MCAsmLayout::{getSectionFileSize,getSectionAddressSize}
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6b707a8c |
| 01-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove the MCAsmLayout parameter from MCObjectWriter::executePostLayoutBinding
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23e62243 |
| 01-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove the MCAsmLayout parameter from MCObjectWriter::{writeObject,writeSectionData}
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4289c422 |
| 01-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove the MCAsmLayout parameter from MCObjectWriter::recordRelocation
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67957a45 |
| 30-Jun-2024 |
Fangrui Song <i@maskray.me> |
[MC] Start merging MCAsmLayout into MCAssembler
Follow-up to 10c894cffd0f4bef21b54a43b5780240532e44cf.
MCAsmLayout, introduced by ac8a95498a99eb16dff9d3d0186616645d200b6e (2010), provides APIs to c
[MC] Start merging MCAsmLayout into MCAssembler
Follow-up to 10c894cffd0f4bef21b54a43b5780240532e44cf.
MCAsmLayout, introduced by ac8a95498a99eb16dff9d3d0186616645d200b6e (2010), provides APIs to compute fragment/symbol/section offsets. The separate class is cumbersome and passing it around has overhead. Let's remove it as the underlying implementation is tightly coupled with MCAsmLayout anyway.
Some forwarders are added to ease migration.
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bc6d9255 |
| 29-Jun-2024 |
Fangrui Song <i@maskray.me> |
[MC] Simplify isSymbolRefDifferenceFullyResolvedImpl overloads. NFC
The base implementation is simple. Just inline it.
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04c27852 |
| 25-Jun-2024 |
Fangrui Song <i@maskray.me> |
[MC,COFF] Change how we handle section symbols
13a79bbfe583e1d8cc85d241b580907260065eb8 (2017) unified `BeginSymbol` and section symbol for ELF. This patch does the same for COFF.
* In getCOFFSecti
[MC,COFF] Change how we handle section symbols
13a79bbfe583e1d8cc85d241b580907260065eb8 (2017) unified `BeginSymbol` and section symbol for ELF. This patch does the same for COFF.
* In getCOFFSection, all sections now have a `BeginSymbol` (section symbol). We do not need a dummy symbol name when `getBeginSymbol` is needed (used by AsmParser::Run and DWARF generation). * Section symbols are in the global symbol table. `call .text` will reference the section symbol instead of an undefined symbol. This matches GNU assembler. Unlike GNU, redefining the section symbol will cause a "symbol 'foo0' is already defined" error (see `section-sym-err.s`).
Pull Request: https://github.com/llvm/llvm-project/pull/96459
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de0d4827 |
| 23-Jun-2024 |
Fangrui Song <i@maskray.me> |
[MC,COFF] Register .llvm.call-graph-profile in finalizeImpl
All sections should have been created before MCAssembler::layout so that every section has an ordinal. Registering the section in WinCOFFO
[MC,COFF] Register .llvm.call-graph-profile in finalizeImpl
All sections should have been created before MCAssembler::layout so that every section has an ordinal. Registering the section in WinCOFFObjectWriter::executePostLayoutBinding is a hack.
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46beeaa3 |
| 20-Jun-2024 |
aengelke <engelke@in.tum.de> |
[MC] Remove SectionKind from MCSection (#96067)
There are only three actual uses of the section kind in MCSection:
isText(), XCOFF, and WebAssembly. Store isText() in the MCSection, and
store othe
[MC] Remove SectionKind from MCSection (#96067)
There are only three actual uses of the section kind in MCSection:
isText(), XCOFF, and WebAssembly. Store isText() in the MCSection, and
store other info in the actual section variants where required.
ELF and COFF flags also encode all relevant information, so for these
two section variants, remove the SectionKind parameter entirely.
This allows to remove the string switch (which is unnecessary and
inaccurate) from createELFSectionImpl. This was introduced in
[D133456](https://reviews.llvm.org/D133456), but apparently, it was
never hit for non-writable sections anyway and the resulting kind was
never used.
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Revision tags: llvmorg-18.1.8 |
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f808abf5 |
| 14-Jun-2024 |
Fangrui Song <i@maskray.me> |
[MC] Add MCFragment allocation helpers
`allocFragment` might be changed to a placement new when the allocation strategy changes.
`allocInitialFragment` is to deduplicate the following pattern ```
[MC] Add MCFragment allocation helpers
`allocFragment` might be changed to a placement new when the allocation strategy changes.
`allocInitialFragment` is to deduplicate the following pattern ``` auto *F = new MCDataFragment(); Result->addFragment(*F); F->setParent(Result); ```
Pull Request: https://github.com/llvm/llvm-project/pull/95197
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cb63abca |
| 11-Jun-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove getFragmentList uses. NFC
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Revision tags: llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3 |
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46b853a8 |
| 22-Mar-2024 |
Billy Laws <blaws05@gmail.com> |
[MC][COFF][AArch64] Treat ARM64EC/X as ARM64 for relocations (#86019)
Since ARM64EC/X objects use regular ARM64 relocations, any special
handling must be done for them too.
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