Revision tags: llvmorg-21-init, llvmorg-19.1.7 |
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283dca56 |
| 13-Jan-2025 |
Daniel Paoliello <danpao@microsoft.com> |
Reapply "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)" (#122777)
This reverts commit 2f7ade4b5e399962e18f5f9a0ab0b7335deece51.
Fi
Reapply "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)" (#122777)
This reverts commit 2f7ade4b5e399962e18f5f9a0ab0b7335deece51.
Fix is available in #122762
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2f7ade4b |
| 13-Jan-2025 |
Kirill Stoimenov <kstoimenov@google.com> |
Revert "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)"
Breaks sanitizer build: https://lab.llvm.org/buildbot/#/builders/52/builds/5
Revert "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)"
Breaks sanitizer build: https://lab.llvm.org/buildbot/#/builders/52/builds/5179
This reverts commits: 5ee0a71df919a328c714e25f0935c21e586cc18b d997a722c194feec5f3a94dec5acdce59ac5e55b
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5ee0a71d |
| 12-Jan-2025 |
Daniel Paoliello <danpao@microsoft.com> |
[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)
This change implements import call optimization for AArch64 Windows (equivalent to th
[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)
This change implements import call optimization for AArch64 Windows (equivalent to the undocumented MSVC `/d2ImportCallOptimization` flag).
Import call optimization adds additional data to the binary which can be used by the Windows kernel loader to rewrite indirect calls to imported functions as direct calls. It uses the same [Dynamic Value Relocation Table mechanism that was leveraged on x64 to implement `/d2GuardRetpoline`](https://techcommunity.microsoft.com/blog/windowsosplatform/mitigating-spectre-variant-2-with-retpoline-on-windows/295618).
The change to the obj file is to add a new `.impcall` section with the following layout: ```cpp // Per section that contains calls to imported functions: // uint32_t SectionSize: Size in bytes for information in this section. // uint32_t Section Number // Per call to imported function in section: // uint32_t Kind: the kind of imported function. // uint32_t BranchOffset: the offset of the branch instruction in its // parent section. // uint32_t TargetSymbolId: the symbol id of the called function. ```
NOTE: If the import call optimization feature is enabled, then the `.impcall` section must be emitted, even if there are no calls to imported functions.
The implementation is split across a few parts of LLVM: * During AArch64 instruction selection, the `GlobalValue` for each call to a global is recorded into the Extra Information for that node. * During lowering to machine instructions, the called global value for each call is noted in its containing `MachineFunction`. * During AArch64 asm printing, if the import call optimization feature is enabled: - A (new) `.impcall` directive is emitted for each call to an imported function. - The `.impcall` section is emitted with its magic header (but is not filled in). * During COFF object writing, the `.impcall` section is filled in based on each `.impcall` directive that were encountered.
The `.impcall` section can only be filled in when we are writing the COFF object as it requires the actual section numbers, which are only assigned at that point (i.e., they don't exist during asm printing).
I had tried to avoid using the Extra Information during instruction selection and instead implement this either purely during asm printing or in a `MachineFunctionPass` (as suggested in [on the forums](https://discourse.llvm.org/t/design-gathering-locations-of-instructions-to-emit-into-a-section/83729/3)) but this was not possible due to how loading and calling an imported function works on AArch64. Specifically, they are emitted as `ADRP` + `LDR` (to load the symbol) then a `BR` (to do the call), so at the point when we have machine instructions, we would have to work backwards through the instructions to discover what is being called. An initial prototype did work by inspecting instructions; however, it didn't correctly handle the case where the same function was called twice in a row, which caused LLVM to elide the `ADRP` + `LDR` and reuse the previously loaded address. Worse than that, sometimes for the double-call case LLVM decided to spill the loaded address to the stack and then reload it before making the second call. So, instead of trying to implement logic to discover where the value in a register came from, I instead recorded the symbol being called at the last place where it was easy to do: instruction selection.
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Revision tags: llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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d73d5c8c |
| 15-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[MC] Remove unused includes (NFC) (#116317)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3 |
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a9d51f0e |
| 25-Oct-2024 |
Fangrui Song <i@maskray.me> |
[MCParser] De-capitalize ParseDirectiveCGProfile. NFC
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0ef90bbd |
| 24-Oct-2024 |
Fangrui Song <i@maskray.me> |
[MCParser] De-capitalize COFFAsmParser functions. NFC
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Revision tags: llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
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46beeaa3 |
| 20-Jun-2024 |
aengelke <engelke@in.tum.de> |
[MC] Remove SectionKind from MCSection (#96067)
There are only three actual uses of the section kind in MCSection:
isText(), XCOFF, and WebAssembly. Store isText() in the MCSection, and
store othe
[MC] Remove SectionKind from MCSection (#96067)
There are only three actual uses of the section kind in MCSection:
isText(), XCOFF, and WebAssembly. Store isText() in the MCSection, and
store other info in the actual section variants where required.
ELF and COFF flags also encode all relevant information, so for these
two section variants, remove the SectionKind parameter entirely.
This allows to remove the string switch (which is unnecessary and
inaccurate) from createELFSectionImpl. This was introduced in
[D133456](https://reviews.llvm.org/D133456), but apparently, it was
never hit for non-writable sections anyway and the resulting kind was
never used.
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Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init |
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63538a08 |
| 21-Jun-2023 |
cynecx <me@cynecx.net> |
[MC] Add .pushsection/.popsection support to COFFAsmParser
The COFFAsmParser (to my surprise) didn't support the .pushsection and .popsection directives. These directives aren't directly useful, how
[MC] Add .pushsection/.popsection support to COFFAsmParser
The COFFAsmParser (to my surprise) didn't support the .pushsection and .popsection directives. These directives aren't directly useful, however for frontends that have inline asm support this is really useful. Rust in particular, has support for inline asm, which can be used together with these directives to "emulate" features like static generics. This patch adds support for the two mentioned directives.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D152085
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Revision tags: llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2 |
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7198bacc |
| 17-Apr-2023 |
Eli Friedman <efriedma@quicinc.com> |
[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols
This is mostly useful for ARM64EC, which uses such symbols extensively.
One interesting quirk of ARM64EC is that we need
[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols
This is mostly useful for ARM64EC, which uses such symbols extensively.
One interesting quirk of ARM64EC is that we need to be able to emit weak symbols that point at each other (so if either symbol is defined elsewhere, both symbols point at the definition). This handling is currently restricted to weak_anti_dep symbols, because we depend on the current behavior of resolving weak symbols in some cases.
Differential Revision: https://reviews.llvm.org/D145208
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439f804c |
| 27-Apr-2023 |
Zequan Wu <zequanwu@google.com> |
Revert "[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols"
This reverts commit 10c17c97ebaf81ac26f6830e51a7a57ddcf63cd2. It causes undefined symbol error on chromium windo
Revert "[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols"
This reverts commit 10c17c97ebaf81ac26f6830e51a7a57ddcf63cd2. It causes undefined symbol error on chromium windows build. A small repro was uploaded to the code review.
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10c17c97 |
| 17-Apr-2023 |
Eli Friedman <efriedma@quicinc.com> |
[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols
This is mostly useful for ARM64EC, which uses such symbols extensively.
One interesting quirk of ARM64EC is that we need
[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols
This is mostly useful for ARM64EC, which uses such symbols extensively.
One interesting quirk of ARM64EC is that we need to be able to emit weak symbols that point at each other (so if either symbol is defined elsewhere, both symbols point at the definition). This required a few changes to the way we handle weak symbols on Windows.
Differential Revision: https://reviews.llvm.org/D145208
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29a88f99 |
| 13-Apr-2023 |
Arthur Eubanks <aeubanks@google.com> |
Revert "[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols"
This reverts commit fffdb7eac58b4efde5e23c1281e7a7f93a42d280.
Causes crashes, see https://reviews.llvm.org/D145
Revert "[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols"
This reverts commit fffdb7eac58b4efde5e23c1281e7a7f93a42d280.
Causes crashes, see https://reviews.llvm.org/D145208
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Revision tags: llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4 |
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fffdb7ea |
| 03-Mar-2023 |
Eli Friedman <efriedma@quicinc.com> |
[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols
This is mostly useful for ARM64EC, which uses such symbols extensively.
One interesting quirk of ARM64EC is that we need
[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols
This is mostly useful for ARM64EC, which uses such symbols extensively.
One interesting quirk of ARM64EC is that we need to be able to emit weak symbols that point at each other (so if either symbol is defined elsewhere, both symbols point at the definition). This required a few changes to the way we handle weak symbols on Windows.
Differential Revision: https://reviews.llvm.org/D145208
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Revision tags: llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2 |
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62c7f035 |
| 07-Feb-2023 |
Archibald Elliott <archibald.elliott@arm.com> |
[NFC][TargetParser] Remove llvm/ADT/Triple.h
I also ran `git clang-format` to get the headers in the right order for the new location, which has changed the order of other headers in two files.
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Revision tags: llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4 |
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b18293ed |
| 19-Oct-2022 |
chenglin.bi <chenglin.bi@linaro.org> |
[MC][COFF] Add COFF section flag "Info"
For now, we have not parse section flag `Info` in asm file. When we emit a section with info flag to asm, then compile asm to obj we will lose the Info flag f
[MC][COFF] Add COFF section flag "Info"
For now, we have not parse section flag `Info` in asm file. When we emit a section with info flag to asm, then compile asm to obj we will lose the Info flag for the section. The motivation of this change is ARM64EC's hybmp$x section. If we lose the Info flag MSVC link will report a warning: `warning LNK4078: multiple '.hybmp' sections found with different attributes`
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D136125
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Revision tags: llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6 |
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adf4142f |
| 11-Jun-2022 |
Fangrui Song <i@maskray.me> |
[MC] De-capitalize SwitchSection. NFC
Add SwitchSection to return switchSection. The API will be removed soon.
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Revision tags: llvmorg-14.0.5 |
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15d82c62 |
| 07-Jun-2022 |
Fangrui Song <i@maskray.me> |
[MC] De-capitalize MCStreamer functions
Follow-up to c031378ce01b8485ba0ef486654bc9393c4ac024 . The class is mostly consistent now.
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Revision tags: llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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6b75a352 |
| 11-Nov-2021 |
Martin Storsjö <martin@martin.st> |
[ARM] [MC] Add support for writing ARM WinEH unwind info
This includes .seh_* directives for generating it from assembly. It is designed fairly similarly to the ARM64 handling.
For .seh_handler dir
[ARM] [MC] Add support for writing ARM WinEH unwind info
This includes .seh_* directives for generating it from assembly. It is designed fairly similarly to the ARM64 handling.
For .seh_handler directives, such as ".seh_handler __C_specific_handler, @except" (which is supported on x86_64 and aarch64 so far), the "@except" bit doesn't work in ARM assembly, as '@' is used as a comment character (on all current platforms).
Allow using '%' instead of '@' for this purpose. This convention is used by GAS in similar contexts already, e.g. [1]:
Note on targets where the @ character is the start of a comment (eg ARM) then another character is used instead. For example the ARM port uses the % character.
In practice, this unfortunately means that all such .seh_handler directives will need ifdefs for ARM.
Contrary to ARM64, on ARM, it's quite common that we can't evaluate e.g. the function length at this point, due to instructions whose length is finalized later. (Also, inline jump tables end with a ".p2align 1".)
If unable to to evaluate the function length immediately, emit it as an MCExpr instead. If we'd implement splitting the unwind info for a function (which isn't implemented for ARM64 yet either), we wouldn't know whether we need to split it though.
Avoid calling getFrameIndexOffset() on an unset FuncInfo.UnwindHelpFrameIdx, to avoid triggering asserts in the preexisting testcase CodeGen/ARM/Windows/wineh-basic.ll. (Once MSVC exception handling is fully implemented, those changes can be reverted.)
[1] https://sourceware.org/binutils/docs/as/Section.html#Section
Differential Revision: https://reviews.llvm.org/D125645
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9ee15bba |
| 26-May-2022 |
Fangrui Song <i@maskray.me> |
[MC] Lower case the first letter of EmitCOFF* EmitWin* EmitCV*. NFC
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06943537 |
| 09-Feb-2022 |
serge-sans-paille <sguelton@redhat.com> |
Cleanup MCParser headers
As usual with that header cleanup series, some implicit dependencies now need to be explicit:
llvm/MC/MCParser/MCAsmParser.h no longer includes llvm/MC/MCParser/MCAsmLexer.
Cleanup MCParser headers
As usual with that header cleanup series, some implicit dependencies now need to be explicit:
llvm/MC/MCParser/MCAsmParser.h no longer includes llvm/MC/MCParser/MCAsmLexer.h
Preprocessed lines to build llvm on my setup: after: 1068185081 before: 1068324320
So no compile time benefit to expect, but we still get the looser coupling between files which is great.
Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D119359
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1 |
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632ebc4a |
| 05-May-2021 |
Philipp Krones <philipp.krones@embecosm.com> |
[MC] Untangle MCContext and MCObjectFileInfo
This untangles the MCContext and the MCObjectFileInfo. There is a circular dependency between MCContext and MCObjectFileInfo. Currently this dependency a
[MC] Untangle MCContext and MCObjectFileInfo
This untangles the MCContext and the MCObjectFileInfo. There is a circular dependency between MCContext and MCObjectFileInfo. Currently this dependency also exists during construction: You can't contruct a MOFI without a MCContext without constructing the MCContext with a dummy version of that MOFI first. This removes this dependency during construction. In a perfect world, MCObjectFileInfo wouldn't depend on MCContext at all, but only be stored in the MCContext, like other MC information. This is future work.
This also shifts/adds more information to the MCContext making it more available to the different targets. Namely:
- TargetTriple - ObjectFileType - SubtargetInfo
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101462
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Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2 |
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9c53b2ad |
| 06-Dec-2020 |
Fangrui Song <i@maskray.me> |
[MC] Delete unused declarations
Notes:
* llvm::createAsmStreamer: it has been moved to TargetRegistry.h * (anon ns)::WasmObjectWriter::updateCustomSectionRelocations: remnant of D46335 * COFFAsmPar
[MC] Delete unused declarations
Notes:
* llvm::createAsmStreamer: it has been moved to TargetRegistry.h * (anon ns)::WasmObjectWriter::updateCustomSectionRelocations: remnant of D46335 * COFFAsmParser::ParseSEHRegisterNumber: remnant of D66625 * llvm::CodeViewContext::isValidCVFileNumber: accidentally added by r279847
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Revision tags: llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2 |
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5b86d130 |
| 07-Aug-2020 |
Martin Storsjö <martin@martin.st> |
[AArch64] Generate and parse SEH assembly directives
This ensures that you get the same output regardless if generating code directly to an object file or if generating assembly and assembling that.
[AArch64] Generate and parse SEH assembly directives
This ensures that you get the same output regardless if generating code directly to an object file or if generating assembly and assembling that.
Add implementations of the EmitARM64WinCFI*() methods in AArch64TargetAsmStreamer, and fill in one blank in MCAsmStreamer.
Add corresponding directive handlers in AArch64AsmParser and COFFAsmParser.
Some SEH directive names have been picked to match the prior art for SEH assembly directives for x86_64, e.g. the spelling of ".seh_startepilogue" matching the preexisting ".seh_endprologue".
For the directives for saving registers, the exact spelling from the arm64 documentation is picked, e.g. ".seh_save_reg" (to follow that naming for all the other ones, e.g. ".seh_save_fregp_x"), while the corresponding one for x86_64 is plain ".seh_savereg" without the second underscore.
Directives in the epilogues have the same names as in prologues, e.g. .seh_savereg, even though the registers are restored, not saved, at that point.
Differential Revision: https://reviews.llvm.org/D86529
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Revision tags: llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2 |
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0f0c5af3 |
| 26-Jun-2020 |
Zequan Wu <zequanwu@google.com> |
[COFF] Add cg_profile directive and .llvm.call-graph-profile section
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D83597
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c52bee61 |
| 22-Jun-2020 |
Fangrui Song <maskray@google.com> |
[MCParser] Support quoted section name for COFF
This features matches ELFAsmParser and makes it possible to use `.section ".llvm.call-graph-profile","n"`
Reviewed By: zequanwu
Differential Revisio
[MCParser] Support quoted section name for COFF
This features matches ELFAsmParser and makes it possible to use `.section ".llvm.call-graph-profile","n"`
Reviewed By: zequanwu
Differential Revision: https://reviews.llvm.org/D82240
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