History log of /llvm-project/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp (Results 1 – 25 of 419)
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Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1
# ed4e75d5 26-Jul-2024 Pengcheng Wang <wangpengcheng.pp@bytedance.com>

[CodeGen] Remove AA parameter of isSafeToMove (#100691)

This `AA` parameter is not used and for most uses they just pass
a nullptr.

The use of `AA` was removed since 8d0383e.


# 8ebe499e 23-Jul-2024 Jay Foad <jay.foad@amd.com>

[LLVM] Fix typo "depedent"


Revision tags: llvmorg-20-init
# 01191874 15-Jul-2024 paperchalice <liujunchang97@outlook.com>

[CodeGen] Port `two-address-instructions` to new pass manager (#98632)

Add `TwoAddressInstructionPass`.


# abde52aa 10-Jul-2024 paperchalice <liujunchang97@outlook.com>

[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)

- Add `LiveIntervalsAnalysis`.
- Add `LiveIntervalsPrinterPass`.
- Use `LiveIntervalsWrapperPass` in legacy pass manager.
- Use

[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)

- Add `LiveIntervalsAnalysis`.
- Add `LiveIntervalsPrinterPass`.
- Use `LiveIntervalsWrapperPass` in legacy pass manager.
- Use `std::unique_ptr` instead of raw pointer for `LICalc`, so
destructor and default move constructor can handle it correctly.

This would be the last analysis required by `PHIElimination`.

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# 4010f894 09-Jul-2024 paperchalice <liujunchang97@outlook.com>

[CodeGen][NewPM] Port `SlotIndexes` to new pass manager (#97941)

- Add `SlotIndexesAnalysis`.
- Add `SlotIndexesPrinterPass`.
- Use `SlotIndexesWrapperPass` in legacy pass.


# ac0b2814 09-Jul-2024 paperchalice <liujunchang97@outlook.com>

[CodeGen][NewPM] Port `LiveVariables` to new pass manager (#97880)

- Port `LiveVariables` to new pass manager.
- Convert to `LiveVariablesWrapperPass` in legacy pass manager.


Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5
# f6d431f2 24-Apr-2024 Xu Zhang <simonzgx@gmail.com>

[CodeGen] Make the parameter TRI required in some functions. (#85968)

Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and `findRegisterDefOperand`, that have too many

[CodeGen] Make the parameter TRI required in some functions. (#85968)

Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`, `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.

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Revision tags: llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3
# 9bda1de0 07-Feb-2024 Carl Ritson <carl.ritson@amd.com>

[TwoAddressInstruction] Propagate undef flags for partial defs (#79286)

If part of a register (lowered from REG_SEQUENCE) is undefined then we
should propagate undef flags to uses of those lanes. T

[TwoAddressInstruction] Propagate undef flags for partial defs (#79286)

If part of a register (lowered from REG_SEQUENCE) is undefined then we
should propagate undef flags to uses of those lanes. This is only
performed when live intervals are present as it requires live intervals
to correctly match uses to defs, and the primary goal is to allow
precise computation of subrange intervals.

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Revision tags: llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init
# 6752f151 12-Jan-2024 Carl Ritson <carl.ritson@amd.com>

[TwoAddressInstruction] Recompute live intervals for partial defs (#74431)

Force live interval recomputation for a register if its definition is
narrowed to become partial. The live interval repair

[TwoAddressInstruction] Recompute live intervals for partial defs (#74431)

Force live interval recomputation for a register if its definition is
narrowed to become partial. The live interval repair process cannot
otherwise detect these changes.

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# 41cb686d 25-Dec-2023 Kazu Hirata <kazu@google.com>

[CodeGen] Use range-based for loops (NFC)


Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4
# f9306f6d 25-Oct-2023 Kazu Hirata <kazu@google.com>

[ADT] Rename llvm::erase_value to llvm::erase (NFC) (#70156)

C++20 comes with std::erase to erase a value from std::vector. This
patch renames llvm::erase_value to llvm::erase for consistency with

[ADT] Rename llvm::erase_value to llvm::erase (NFC) (#70156)

C++20 comes with std::erase to erase a value from std::vector. This
patch renames llvm::erase_value to llvm::erase for consistency with
C++20.

We could make llvm::erase more similar to std::erase by having it
return the number of elements removed, but I'm not doing that for now
because nobody seems to care about that in our code base.

Since there are only 50 occurrences of erase_value in our code base,
this patch replaces all of them with llvm::erase and deprecates
llvm::erase_value.

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# 21e1b13f 19-Oct-2023 Jay Foad <jay.foad@amd.com>

[TwoAddressInstruction] Handle physical registers with LiveIntervals (#66784)

Teach the LiveIntervals path in isPlainlyKilled to handle physical
registers, to get equivalent functionality with the

[TwoAddressInstruction] Handle physical registers with LiveIntervals (#66784)

Teach the LiveIntervals path in isPlainlyKilled to handle physical
registers, to get equivalent functionality with the LiveVariables path.

Test this by adding -early-live-intervals RUN lines to a handful of
tests that would fail without this.

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Revision tags: llvmorg-17.0.3, llvmorg-17.0.2
# 44e997a1 19-Sep-2023 Jay Foad <jay.foad@amd.com>

[TwoAddressInstruction] Use isPlainlyKilled in processTiedPairs (#65976)

Calling isPlainlyKilled instead of directly checking for a kill flag
should make processTiedPairs behave the same with LiveI

[TwoAddressInstruction] Use isPlainlyKilled in processTiedPairs (#65976)

Calling isPlainlyKilled instead of directly checking for a kill flag
should make processTiedPairs behave the same with LiveIntervals
(i.e. when compiling with -early-live-intervals) as it does with
LiveVariables.

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Revision tags: llvmorg-17.0.1
# d8d0588f 18-Sep-2023 Jay Foad <jay.foad@amd.com>

[TwoAddressInstruction] Update LiveIntervals after INSERT_SUBREG with undef read (#66211)

Update LiveIntervals after rewriting:
%reg = INSERT_SUBREG undef %reg, %subreg, subidx
to:
undef %reg

[TwoAddressInstruction] Update LiveIntervals after INSERT_SUBREG with undef read (#66211)

Update LiveIntervals after rewriting:
%reg = INSERT_SUBREG undef %reg, %subreg, subidx
to:
undef %reg:subidx = COPY %subreg

D113044 implemented this for the non-undef case.

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Revision tags: llvmorg-17.0.0
# 0a1aa6cd 14-Sep-2023 Arthur Eubanks <aeubanks@google.com>

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future chang

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.

This matches other nearby enums.

For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::

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# fd453e23 10-Sep-2023 Jay Foad <jay.foad@amd.com>

[TwoAddressInstruction] Use member functions instead of static helpers

This just avoids explicitly passing around common pointers like MRI and
TII. NFC.


Revision tags: llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5
# aa2d0fbc 21-May-2023 Sergei Barannikov <barannikov88@gmail.com>

[MC] Add MCRegisterInfo::regunits for iteration over register units

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D152098


# 5022fc2a 24-May-2023 Jay Foad <jay.foad@amd.com>

[CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.

Differential Revision: https://reviews.llvm.org/D151424


Revision tags: llvmorg-16.0.4, llvmorg-16.0.3
# 43b38696 20-Apr-2023 Akshay Khadse <akshayskhadse@gmail.com>

Fix uninitialized class members

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D148692


Revision tags: llvmorg-16.0.2
# 8bf7f86d 17-Apr-2023 Akshay Khadse <akshayskhadse@gmail.com>

Fix uninitialized pointer members in CodeGen

This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.

Reviewed By: LuoYuanke

Differentia

Fix uninitialized pointer members in CodeGen

This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D148303

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Revision tags: llvmorg-16.0.1
# effb7ab6 29-Mar-2023 Jay Foad <jay.foad@amd.com>

[TwoAddressInstruction] Improve tests for register killed by instruction

Define and use a MachineOperand overload of isPlainlyKilled. This
improves codegen in a couple of tests because it catches th

[TwoAddressInstruction] Improve tests for register killed by instruction

Define and use a MachineOperand overload of isPlainlyKilled. This
improves codegen in a couple of tests because it catches the case where
MO does not kill Reg but another operand of the same instruction does.

Differential Revision: https://reviews.llvm.org/D147167

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Revision tags: llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2
# d170a254 03-Feb-2023 Jay Foad <jay.foad@amd.com>

[CodeGen] Define and use MachineOperand::getOperandNo

This is a helper function to very slightly simplify many calls to
MachineInstruction::getOperandNo.

Differential Revision: https://reviews.llvm

[CodeGen] Define and use MachineOperand::getOperandNo

This is a helper function to very slightly simplify many calls to
MachineInstruction::getOperandNo.

Differential Revision: https://reviews.llvm.org/D143250

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Revision tags: llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7
# 821a5958 23-Dec-2022 Danila Malyutin <dmalyutin@azul.com>

[TwoAddressInstruction] Constrain RegClass when processing a statepoint

This transformation could've triggered a verifier assert if RegA and RegB
were of different reg classes. Fix this by constrain

[TwoAddressInstruction] Constrain RegClass when processing a statepoint

This transformation could've triggered a verifier assert if RegA and RegB
were of different reg classes. Fix this by constraining as the comment
for replaceRegWith suggests.

Differential Revision: https://reviews.llvm.org/D140672

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Revision tags: llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4
# 33f78d09 21-Oct-2022 Jay Foad <jay.foad@amd.com>

[TwoAddressInstruction] Fix stale LiveVariables info in processStatepoint

D129213 improves verification of LiveVariables, and caused
CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll to fail with:

[TwoAddressInstruction] Fix stale LiveVariables info in processStatepoint

D129213 improves verification of LiveVariables, and caused
CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll to fail with:
*** Bad machine code: LiveVariables: Block should not be in AliveBlocks ***
after Two-Address instruction pass.

Fix it by clearing AliveBlocks for a register which is no longer used.

Differential Revision: https://reviews.llvm.org/D136445

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Revision tags: llvmorg-15.0.3, working, llvmorg-15.0.2
# 94ebd7d9 21-Sep-2022 Matt Arsenault <Matthew.Arsenault@amd.com>

MachineVerifier: Verify REG_SEQUENCE

Somehow there was no verification of this, other than an ad-hoc
assertion in TwoAddressInstructions.


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