Revision tags: llvmorg-21-init, llvmorg-19.1.7 |
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#
45c01e8a |
| 19-Dec-2024 |
Finn Plummer <50529406+inbelic@users.noreply.github.com> |
[NFC][TargetTransformInfo][VectorUtils] Consolidate `isVectorIntrinsic...` api (#117635)
- update `VectorUtils:isVectorIntrinsicWithScalarOpAtArg` to use TTI for
all uses, to allow specifiction of
[NFC][TargetTransformInfo][VectorUtils] Consolidate `isVectorIntrinsic...` api (#117635)
- update `VectorUtils:isVectorIntrinsicWithScalarOpAtArg` to use TTI for
all uses, to allow specifiction of target specific intrinsics
- add TTI to the `isVectorIntrinsicWithStructReturnOverloadAtField` api
- update TTI api to provide `isTargetIntrinsicWith...` functions and
consistently name them
- move `isTriviallyScalarizable` to VectorUtils
- update all uses of the api and provide the TTI parameter
Resolves #117030
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Revision tags: llvmorg-19.1.6, llvmorg-19.1.5 |
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#
8663b877 |
| 21-Nov-2024 |
Finn Plummer <50529406+inbelic@users.noreply.github.com> |
[NFC][VectorUtils][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (#114849)
This changes allows target intrinsics to specify and overwrite overloaded types.
- Updates `Repl
[NFC][VectorUtils][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (#114849)
This changes allows target intrinsics to specify and overwrite overloaded types.
- Updates `ReplaceWithVecLib` to not provide TTI as there most probably won't be a use-case
- Updates `SLPVectorizer` to use available TTI
- Updates `VPTransformState` to pass down TTI
- Updates `VPlanRecipe` to use passed-down TTI
This change will let us add scalarization for `asdouble`: #114847
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Revision tags: llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2 |
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#
82b40fd4 |
| 11-Oct-2024 |
Tex Riddell <texr@microsoft.com> |
Fix scalar overload name constructed by ReplaceWithVeclib.cpp (#111095)
ReplaceWithVeclib.cpp would construct overload name using all the
arguments in the intrinsic, but overloads should only be co
Fix scalar overload name constructed by ReplaceWithVeclib.cpp (#111095)
ReplaceWithVeclib.cpp would construct overload name using all the
arguments in the intrinsic, but overloads should only be constructed
from arguments for which isVectorIntrinsicWithOverloadTypeAtArg returns
true, including the return type first (index -1).
Additionally,
- skip when `Intrinsic::not_intrinsic`, otherwise
`isVectorIntrinsicWithOverloadTypeAtArg` asserts for some
IntrinsicCalls.
Unblocks translation for pow and atan2 intrinsics.
Fixes #111093
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Revision tags: llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8 |
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#
e4790ce2 |
| 10-Jun-2024 |
Paschalis Mpeis <paschalis.mpeis@arm.com> |
[TLI] ReplaceWithVecLib: drop Instruction support (#94365)
Refactor the pass to only support `IntrinsicInst` calls.
`ReplaceWithVecLib` used to support instructions, as AArch64 was using
this pa
[TLI] ReplaceWithVecLib: drop Instruction support (#94365)
Refactor the pass to only support `IntrinsicInst` calls.
`ReplaceWithVecLib` used to support instructions, as AArch64 was using
this pass to replace a vectorized frem instruction to the fmod vector
library call (through TLI).
As this replacement is now done by the codegen (#83859), there is no
need for this pass to support instructions.
Additionally, removed 'frem' tests from:
- AArch64/replace-with-veclib-armpl.ll
- AArch64/replace-with-veclib-sleef-scalable.ll
- AArch64/replace-with-veclib-sleef.ll
Such testing is done at codegen level:
- #83859
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Revision tags: llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4 |
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#
330af6ed |
| 24-Feb-2024 |
MalaySanghiIntel <148750629+MalaySanghiIntel@users.noreply.github.com> |
Convert argument to reference. (#82741)
Avoid copy of large object
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Revision tags: llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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#
92289db8 |
| 17-Jan-2024 |
Alexandros Lamprineas <alexandros.lamprineas@arm.com> |
[VFABI] Move the Vector ABI demangling utility to LLVMCore. (#77513)
This fixes #71892 allowing us to check magled names in the IR verifier.
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#
8e514c57 |
| 16-Jan-2024 |
Paschalis Mpeis <paschalis.mpeis@arm.com> |
Reapply [TLI] Fix replace-with-veclib crash with invalid arguments (#77945)
Fix a crash of `replace-with-veclib` pass, when the arguments of the TLI
mapping do not match the original call.
Now, it
Reapply [TLI] Fix replace-with-veclib crash with invalid arguments (#77945)
Fix a crash of `replace-with-veclib` pass, when the arguments of the TLI
mapping do not match the original call.
Now, it simply ignores such cases.
Test require assertions as it accesses programmatically the debug log.
Reapplies reverted PR #77112
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#
a300b240 |
| 12-Jan-2024 |
Paschalis Mpeis <Paschalis.Mpeis@arm.com> |
Revert "[TLI] Fix replace-with-veclib crash with invalid arguments (#77112)"
This reverts commit 9fdc568824b0992d48704dfa530a12073cc02f5e, as it linker crashes on some platforms.
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#
9fdc5688 |
| 12-Jan-2024 |
Paschalis Mpeis <paschalis.mpeis@arm.com> |
[TLI] Fix replace-with-veclib crash with invalid arguments (#77112)
Fix a crash of `replace-with-veclib` pass, when the arguments of the TLI
mapping do not match the original call.
Now, it simply
[TLI] Fix replace-with-veclib crash with invalid arguments (#77112)
Fix a crash of `replace-with-veclib` pass, when the arguments of the TLI
mapping do not match the original call.
Now, it simply ignores such cases.
Test require assertions as it accesses programmatically the debug log.
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#
68a1583a |
| 08-Jan-2024 |
Paschalis Mpeis <paschalis.mpeis@arm.com> |
[TLI] replace-with-veclib works with FRem Instruction. (#76166)
Updated SLEEF and ArmPL tests with Fixed-Width and Scalable cases for
frem. Those are mapped to fmod/fmodf.
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#
2e3d77d6 |
| 21-Dec-2023 |
Paschalis Mpeis <paschalis.mpeis@arm.com> |
[TLI] Pass replace-with-veclib works with Scalable Vectors. (#73642)
[TLI] Pass replace-with-veclib works with Scalable Vectors.
The pass is heavily refactored.
It uses the Masked variant of a T
[TLI] Pass replace-with-veclib works with Scalable Vectors. (#73642)
[TLI] Pass replace-with-veclib works with Scalable Vectors.
The pass is heavily refactored.
It uses the Masked variant of a TLI method when the Intrinsic operates on Scalable Vectors.
Improve tests for ArmPL and SLEEF Intrinsics:
- Auto-generate test `armpl-intrinsics.ll`, and use active lane mask to have shorter `shufflevector` check lines.
- Update scripts now add `@llvm.compiler.used` instead of using the regex: `@[[LLVM_COMPILER_USED:[a-zA-Z0-9_$"\\.-]+]]`
- Add simplifycfg pass and noalias to ensure tail folding. `noalias` attribute was added only to the `%in.ptr` parameter of the ArmPL Intrinsics.
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2 |
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#
01797dad |
| 02-Oct-2023 |
JolantaJensen <107627027+JolantaJensen@users.noreply.github.com> |
Fix mechanism propagating mangled names for TLI function mappings (#66656)
Currently the mappings from TLI are used to generate the list of
available "scalar to vector" mappings attached to scalar
Fix mechanism propagating mangled names for TLI function mappings (#66656)
Currently the mappings from TLI are used to generate the list of
available "scalar to vector" mappings attached to scalar calls as
"vector-function-abi-variant" LLVM IR attribute. Function names from TLI
are wrapped in mangled name following the pattern:
_ZGV<isa><mask><vlen><parameters>_<scalar_name>[(<vector_redirection>)]
The problem is the mangled name uses _LLVM_ as the ISA name which
prevents the compiler to compute vectorization factor for scalable
vectors as it cannot make any decision based on the _LLVM_ ISA. If we
use "s" as the ISA name, the compiler can make decisions based on VFABI
specification where SVE spacific rules are described.
This patch is only a refactoring stage where there is no change to the
compiler's behaviour.
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Revision tags: llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init |
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#
4eb06e57 |
| 23-Jun-2023 |
Kazu Hirata <kazu@google.com> |
[LegacyPM] Remove LoopAccessLegacyAnalysis
Differential Revision: https://reviews.llvm.org/D153610
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Revision tags: llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2 |
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#
40c60c02 |
| 13-Apr-2023 |
Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> |
[Passes] Remove the legacy DemandedBitsWrapperPass
Last user of DemandedBitsWrapperPass was the BDCE pass. Since the legacy PM version of BDCE was removed in an earlier commit, this patch removes th
[Passes] Remove the legacy DemandedBitsWrapperPass
Last user of DemandedBitsWrapperPass was the BDCE pass. Since the legacy PM version of BDCE was removed in an earlier commit, this patch removes the now unused DemandedBitsWrapperPass.
Differential Revision: https://reviews.llvm.org/D148336
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Revision tags: llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4 |
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#
6f81903e |
| 03-May-2022 |
David Green <david.green@arm.com> |
[LV][SLP] Mark fptosi_sat as vectorizable
This adds fptosi_sat and fptoui_sat to the list of trivially vectorizable functions, mainly so that the loop vectorizer can vectorize the instruction. Marki
[LV][SLP] Mark fptosi_sat as vectorizable
This adds fptosi_sat and fptoui_sat to the list of trivially vectorizable functions, mainly so that the loop vectorizer can vectorize the instruction. Marking them as trivially vectorizable also allows them to be SLP vectorized, and Scalarized.
The signature of a fptosi_sat requires two type overrides (@llvm.fptosi.sat.v2i32.v2f32), unlike other intrinsics that often only take a single. This patch alters hasVectorInstrinsicOverloadedScalarOpd to isVectorIntrinsicWithOverloadTypeAtArg, so that it can mark the first operand of the intrinsic as a overloaded (but not scalar) operand.
Differential Revision: https://reviews.llvm.org/D124358
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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2 |
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#
9727c77d |
| 25-Apr-2022 |
David Green <david.green@arm.com> |
[NFC] Rename Instrinsic to Intrinsic
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Revision tags: llvmorg-14.0.1 |
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#
989f1c72 |
| 15-Mar-2022 |
serge-sans-paille <sguelton@redhat.com> |
Cleanup codegen includes
This is a (fixed) recommit of https://reviews.llvm.org/D121169
after: 1061034926 before: 1063332844
Discourse thread: https://discourse.llvm.org/t/include-what-you-use-in
Cleanup codegen includes
This is a (fixed) recommit of https://reviews.llvm.org/D121169
after: 1061034926 before: 1063332844
Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D121681
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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3 |
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#
a278250b |
| 10-Mar-2022 |
Nico Weber <thakis@chromium.org> |
Revert "Cleanup codegen includes"
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https:/
Revert "Cleanup codegen includes"
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https://reviews.llvm.org/D121169
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#
7f230fee |
| 07-Mar-2022 |
serge-sans-paille <sguelton@redhat.com> |
Cleanup codegen includes
after: 1061034926 before: 1063332844
Differential Revision: https://reviews.llvm.org/D121169
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Revision tags: llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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#
f631173d |
| 30-Sep-2021 |
Kazu Hirata <kazu@google.com> |
[llvm] Migrate from arg_operands to args (NFC)
Note that arg_operands is considered a legacy name. See llvm/include/llvm/IR/InstrTypes.h for details.
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2 |
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#
bb8ce25e |
| 14-Jun-2021 |
Jeroen Dobbelaere <jeroen.dobbelaere@synopsys.com> |
Intrinsic::getName: require a Module argument
Ensure that we provide a `Module` when checking if a rename of an intrinsic is necessary.
This fixes the issue that was detected by https://bugs.chromi
Intrinsic::getName: require a Module argument
Ensure that we provide a `Module` when checking if a rename of an intrinsic is necessary.
This fixes the issue that was detected by https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=32288 (as mentioned by @fhahn), after committing D91250.
Note that the `LLVMIntrinsicCopyOverloadedName` is being deprecated in favor of `LLVMIntrinsicCopyOverloadedName2`.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D99173
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Revision tags: llvmorg-12.0.1-rc1 |
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#
6b9524a0 |
| 06-May-2021 |
Arthur Eubanks <aeubanks@google.com> |
[NewPM] Don't mark AA analyses as preserved
Currently all AA analyses marked as preserved are stateless, not taking into account their dependent analyses. So there's no need to mark them as preserve
[NewPM] Don't mark AA analyses as preserved
Currently all AA analyses marked as preserved are stateless, not taking into account their dependent analyses. So there's no need to mark them as preserved, they won't be invalidated unless their analyses are.
SCEVAAResults was the one exception to this, it was treated like a typical analysis result. Make it like the others and don't invalidate unless SCEV is invalidated.
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D102032
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Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2 |
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#
6577cef9 |
| 12-Feb-2021 |
Lukas Sommer <sommer@esa.tu-darmstadt.de> |
[CodeGen] New pass: Replace vector intrinsics with call to vector library
This patch adds a pass to replace calls to vector intrinsics (i.e., LLVM intrinsics operating on vector operands) with calls
[CodeGen] New pass: Replace vector intrinsics with call to vector library
This patch adds a pass to replace calls to vector intrinsics (i.e., LLVM intrinsics operating on vector operands) with calls to a vector library.
Currently, calls to LLVM intrinsics are only replaced with calls to vector libraries when scalar calls to intrinsics are vectorized by the Loop- or SLP-Vectorizer.
With this pass, it is now possible to replace calls to LLVM intrinsics already operating on vector operands, e.g., if such code was generated by MLIR. For the replacement, information from the TargetLibraryInfo, e.g., as specified via -vector-library is used.
This is a re-try of the original commit 2303e93e66 that was reverted due to pass manager problems. Other minor changes have also been made.
Differential Revision: https://reviews.llvm.org/D95373
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#
2303e93e |
| 04-Feb-2021 |
Lukas Sommer <sommer@esa.tu-darmstadt.de> |
[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls to vector library
This patch adds a pass to replace calls to vector intrinsics (i.e., LLVM intrinsics operating on vecto
[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls to vector library
This patch adds a pass to replace calls to vector intrinsics (i.e., LLVM intrinsics operating on vector operands) with calls to a vector library.
Currently, calls to LLVM intrinsics are only replaced with calls to vector libraries when scalar calls to intrinsics are vectorized by the Loop- or SLP-Vectorizer.
With this pass, it is now possible to replace calls to LLVM intrinsics already operating on vector operands, e.g., if such code was generated by MLIR. For the replacement, information from the TargetLibraryInfo, e.g., as specified via -vector-library is used.
Differential Revision: https://reviews.llvm.org/D95373
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