CalculateSpillWeights does not need to be a pass

Based on discussions with Lang Hames and Jakob Stoklund Olesen at the hacker's lab, and in the light of upcoming work on the PBQP register allocator,

CalculateSpillWeights does not need to be a pass

Based on discussions with Lang Hames and Jakob Stoklund Olesen at the hacker's lab, and in the light of upcoming work on the PBQP register allocator, it was though that CalcSpillWeights does not need to be a pass. This change will enable to customize / tune the spill weight computation depending on the allocator.

Update the documentation style while there.

No functionnal change.

llvm-svn: 194269

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Track new virtual registers by register number.

Track new virtual registers by register number, rather than by the live
interval created for them. This is the first step in separating the
creation o

Track new virtual registers by register number.

Track new virtual registers by register number, rather than by the live
interval created for them. This is the first step in separating the
creation of new virtual registers and new live intervals. Eventually
live intervals will be created and populated on demand after the virtual
registers have been created and used in instructions.

llvm-svn: 188434

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Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.

The main advantages here are way better heuristics, taking into account not
just loop depth but also __builtin_expect a

Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.

The main advantages here are way better heuristics, taking into account not
just loop depth but also __builtin_expect and other static heuristics and will
eventually learn how to use profile info. Most of the work in this patch is
pushing the MachineBlockFrequencyInfo analysis into the right places.

This is good for a 5% speedup on zlib's deflate (x86_64), there were some very
unfortunate spilling decisions in its hottest loop in longest_match(). Other
benchmarks I tried were mostly neutral.

This changes register allocation in subtle ways, update the tests for it.
2012-02-20-MachineCPBug.ll was deleted as it's very fragile and the instruction
it looked for was gone already (but the FileCheck pattern picked up unrelated
stuff).

llvm-svn: 184105

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Replace uses of the deprecated std::auto_ptr with OwningPtr.

llvm-svn: 179373

Remove unused #includes.

llvm-svn: 176467

Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module

Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131

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Make the LiveRegMatrix analysis available to targets.

No functional change, just moved header files.

Targets can inject custom passes between register allocation and
rewriting. This makes it possib

Make the LiveRegMatrix analysis available to targets.

No functional change, just moved header files.

Targets can inject custom passes between register allocation and
rewriting. This makes it possible to tweak the register allocation
before rewriting, using the full global interference checking available
from LiveRegMatrix.

llvm-svn: 168806

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Tidy up a few more uses of MF.getFunction()->getName().

Based on CR feedback from r162301 and Craig Topper's refactoring in r162347
here are a few other places that could use the same API (& in one

Tidy up a few more uses of MF.getFunction()->getName().

Based on CR feedback from r162301 and Craig Topper's refactoring in r162347
here are a few other places that could use the same API (& in one instance drop
a Function.h dependency).

llvm-svn: 162367

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Remove the RenderMachineFunction HTML output pass.

I don't think anyone has been using this functionality for a while, and
it is getting in the way of refactoring now.

llvm-svn: 158876

Remove LiveIntervalUnions from RegAllocBase.

They are living in LiveRegMatrix now.

llvm-svn: 158868

Convert RABasic to using LiveRegMatrix interference checking.

Stop using the LiveIntervalUnions provided by RegAllocBase, they will be
removed soon.

llvm-svn: 158866

Guard private fields that are unused in Release builds with #ifndef NDEBUG.

llvm-svn: 158608

Remove final verification in RABasic.

We now have a proper machine code verifier pass between register
allocation and rewriting.

llvm-svn: 158577

Also compute MBB live-in lists in the new rewriter pass.

This deduplicates some code from the optimizing register allocators, and
it means that it is now possible to change the register allocators'

Also compute MBB live-in lists in the new rewriter pass.

This deduplicates some code from the optimizing register allocators, and
it means that it is now possible to change the register allocators'
solutions simply by editing the VirtRegMap between the register
allocator pass and the rewriter.

llvm-svn: 158249

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Reintroduce VirtRegRewriter.

OK, not really. We don't want to reintroduce the old rewriter hacks.

This patch extracts virtual register rewriting as a separate pass that
runs after the register allo

Reintroduce VirtRegRewriter.

OK, not really. We don't want to reintroduce the old rewriter hacks.

This patch extracts virtual register rewriting as a separate pass that
runs after the register allocator. This is possible now that
CodeGen/Passes.cpp can configure the full optimizing register allocator
pipeline.

The rewriter pass uses register assignments in VirtRegMap to rewrite
virtual registers to physical registers, and it inserts kill flags based
on live intervals.

These finalization steps are the same for the optimizing register
allocators: RABasic, RAGreedy, and PBQP.

llvm-svn: 158244

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Remove unused private fields found by clang's new -Wunused-private-field.

There are some that I didn't remove this round because they looked like
obvious stubs. There are dead variables in gtest too

Remove unused private fields found by clang's new -Wunused-private-field.

There are some that I didn't remove this round because they looked like
obvious stubs. There are dead variables in gtest too, they should be
fixed upstream.

llvm-svn: 158090

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Switch all register list clients to the new MC*Iterator interface.

No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in

Switch all register list clients to the new MC*Iterator interface.

No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

llvm-svn: 157854

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Allow LiveRangeEdit to be created with a NULL parent.

The dead code elimination with callbacks is still useful.

llvm-svn: 157100

Moved LiveRangeEdit.h so that it can be called from other parts of the backend, not just libCodeGen

llvm-svn: 153906

Refactored the LiveRangeEdit interface so that MachineFunction, TargetInstrInfo, MachineRegisterInfo, LiveIntervals, and VirtRegMap are all passed into the constructor and stored as members instead o

Refactored the LiveRangeEdit interface so that MachineFunction, TargetInstrInfo, MachineRegisterInfo, LiveIntervals, and VirtRegMap are all passed into the constructor and stored as members instead of passed in to each method.

llvm-svn: 153903

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Use uint16_t to store register overlaps to reduce static data.

llvm-svn: 152001

Kill off LiveRangeEdit::getNewVRegs and LiveRangeEdit::getUselessVRegs. These
methods are no longer needed now that LinearScan has gone away.

(Contains tweaks trivialSpillEverywhere to enable the re

Kill off LiveRangeEdit::getNewVRegs and LiveRangeEdit::getUselessVRegs. These
methods are no longer needed now that LinearScan has gone away.

(Contains tweaks trivialSpillEverywhere to enable the removal of getNewVRegs).

llvm-svn: 151658

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Clear virtual registers after they are no longer referenced.

Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0.
This makes sharing code for pre/postRA passes more robust.
No

Clear virtual registers after they are no longer referenced.

Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0.
This makes sharing code for pre/postRA passes more robust.
Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA().
To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs().

PEI resets virtual regs when it's done scavenging.

PTX will either have to provide its own PEI pass or assign physregs.

llvm-svn: 151032

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RegAlloc superpass: includes phi elimination, coalescing, and scheduling.

Creates a configurable regalloc pipeline.

Ensure specific llc options do what they say and nothing more: -reglloc=... has n

RegAlloc superpass: includes phi elimination, coalescing, and scheduling.

Creates a configurable regalloc pipeline.

Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.

When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.

CodeGen transformation passes are never "required" as an analysis

ProcessImplicitDefs does not require LiveVariables.

We have a plan to massively simplify some of the early passes within the regalloc superpass.

llvm-svn: 150226

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Add Register mask support to RABasic.

When a virtual register is live across a call, limit the search space to
call-preserved registers.

llvm-svn: 150081