History log of /llvm-project/llvm/lib/CodeGen/RegAllocBasic.cpp (Results 1 – 25 of 157)
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Revision tags: llvmorg-21-init, llvmorg-19.1.7
# 4f96fb5f 13-Jan-2025 Akshat Oke <Akshat.Oke@amd.com>

Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (#122665)

Makes Inline Spiller amenable to the new PM.

This reapplies commit a531800344dc54e9c197a13b22e013f919f3f5e1 r

Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (#122665)

Makes Inline Spiller amenable to the new PM.

This reapplies commit a531800344dc54e9c197a13b22e013f919f3f5e1 reverted
because of two unused private members reported on sanitizer bots.

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# 08955509 10-Jan-2025 Akshat Oke <Akshat.Oke@amd.com>

Revert "Spiller: Detach legacy pass and supply analyses instead (#119… (#122426)

…181)"

This reverts commit a531800344dc54e9c197a13b22e013f919f3f5e1.


# a5318003 10-Jan-2025 Akshat Oke <Akshat.Oke@amd.com>

Spiller: Detach legacy pass and supply analyses instead (#119181)

Makes Inline Spiller amenable to the new PM.


Revision tags: llvmorg-19.1.6
# 2c7ece2e 06-Dec-2024 Akshat Oke <Akshat.Oke@amd.com>

[CodeGen][NewPM] Port LiveStacks analysis to NPM (#118778)


# d9b4bdbf 04-Dec-2024 Akshat Oke <Akshat.Oke@amd.com>

[CodeGen][NewPM] Port LiveDebugVariables to NPM (#115468)

The existing analysis was already a pimpl wrapper.

I have extracted legacy pass logic to a LDVImpl wrapper named
`LiveDebugVariables` wh

[CodeGen][NewPM] Port LiveDebugVariables to NPM (#115468)

The existing analysis was already a pimpl wrapper.

I have extracted legacy pass logic to a LDVImpl wrapper named
`LiveDebugVariables` which is the analysis::Result now. This controls
whether to activate the LDV (depending on `-live-debug-variables` and
DIsubprogram) itself.

The legacy and new analysis only construct the LiveDebugVariables.

VirtRegRewriter will test this.

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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3
# 4e32d723 22-Oct-2024 Akshat Oke <Akshat.Oke@amd.com>

[NewPM][CodeGen] Port LiveRegMatrix to NPM (#109938)


# 93802815 22-Oct-2024 Akshat Oke <Akshat.Oke@amd.com>

[NewPM][CodeGen] Port VirtRegMap to NPM (#109936)


# e6ada716 21-Oct-2024 Ellis Hoag <ellis.sparky.hoag@gmail.com>

[regalloc][basic] Change spill weight for optsize funcs (#112960)

Change the spill weight calculations for `optsize` functions to remove
the block frequency multiplier. For those functions, we do n

[regalloc][basic] Change spill weight for optsize funcs (#112960)

Change the spill weight calculations for `optsize` functions to remove
the block frequency multiplier. For those functions, we do not want to
consider the runtime cost of spilling, only the codesize cost.

I built a large app with the basic and greedy (default) register
allocator enabled.

| Regalloc Type | Uncompressed Size Delta | Compressed Size Delta |
| - | - | - |
| Basic | -303.8 KiB (-0.23%) | -232.0 KiB (-0.39%) |
| Greedy | 159.1 KiB (0.12%) | 130.1 KiB (0.22%) |

Since I only saw a size win with the basic register allocator, I decided
to only change the behavior for that type.

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Revision tags: llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init
# 15b41d20 22-Jul-2024 Christudasan Devadasan <christudasan.devadasan@amd.com>

[CodeGen] change prototype of regalloc filter function (#93525)

[CodeGen] Change the prototype of regalloc filter function

Change the prototype of the filter function so that we can
filter not j

[CodeGen] change prototype of regalloc filter function (#93525)

[CodeGen] Change the prototype of regalloc filter function

Change the prototype of the filter function so that we can
filter not just by RegClass. We need to implement more
complicated filter based upon some other info associated
with each register.

Patch provided by: Gang Chen (gangc@amd.com)

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# 09989996 12-Jul-2024 paperchalice <liujunchang97@outlook.com>

[CodeGen][NewPM] Port `machine-block-freq` to new pass manager (#98317)

- Add `MachineBlockFrequencyAnalysis`.
- Add `MachineBlockFrequencyPrinterPass`.
- Use `MachineBlockFrequencyInfoWrapperPass

[CodeGen][NewPM] Port `machine-block-freq` to new pass manager (#98317)

- Add `MachineBlockFrequencyAnalysis`.
- Add `MachineBlockFrequencyPrinterPass`.
- Use `MachineBlockFrequencyInfoWrapperPass` in legacy pass manager.
- `LazyMachineBlockFrequencyInfo::print` is empty, drop it due to new
pass manager migration.

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# abde52aa 10-Jul-2024 paperchalice <liujunchang97@outlook.com>

[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)

- Add `LiveIntervalsAnalysis`.
- Add `LiveIntervalsPrinterPass`.
- Use `LiveIntervalsWrapperPass` in legacy pass manager.
- Use

[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)

- Add `LiveIntervalsAnalysis`.
- Add `LiveIntervalsPrinterPass`.
- Use `LiveIntervalsWrapperPass` in legacy pass manager.
- Use `std::unique_ptr` instead of raw pointer for `LICalc`, so
destructor and default move constructor can handle it correctly.

This would be the last analysis required by `PHIElimination`.

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# 4010f894 09-Jul-2024 paperchalice <liujunchang97@outlook.com>

[CodeGen][NewPM] Port `SlotIndexes` to new pass manager (#97941)

- Add `SlotIndexesAnalysis`.
- Add `SlotIndexesPrinterPass`.
- Use `SlotIndexesWrapperPass` in legacy pass.


# 79d0de2a 09-Jul-2024 paperchalice <liujunchang97@outlook.com>

[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)

- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.


# 559ea40d 27-Jun-2024 Kazu Hirata <kazu@google.com>

[CodeGen] Use range-based for loops (NFC) (#96855)


# 739a9605 21-Jun-2024 Alexis Engelke <engelke@in.tum.de>

[RegAlloc] Don't call always-true ShouldAllocClass (#96296)

Previously, there was at least one virtual function call for every
allocated register. The only users of this feature are AMDGPU and RISC

[RegAlloc] Don't call always-true ShouldAllocClass (#96296)

Previously, there was at least one virtual function call for every
allocated register. The only users of this feature are AMDGPU and RISC-V
(RVV), other targets don't use this. To easily identify these cases,
change the default functor to nullptr and don't call it for every
allocated register.

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Revision tags: llvmorg-18.1.8
# 837dc542 11-Jun-2024 paperchalice <liujunchang97@outlook.com>

[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result (#94571)

Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree v

[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result (#94571)

Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.

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Revision tags: llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4
# 32cb3c55 15-Apr-2024 Piyou Chen <piyou.chen@sifive.com>

[NFC][LLVM][CodeGen] Move LiveDebugVariables.h into llvm/include/llvm/CodeGen (#88374)

This patch make `LiveDebugVariables` can be used by passes outside of
`lib/CodeGen`.

If we run a pass that

[NFC][LLVM][CodeGen] Move LiveDebugVariables.h into llvm/include/llvm/CodeGen (#88374)

This patch make `LiveDebugVariables` can be used by passes outside of
`lib/CodeGen`.

If we run a pass that occurs between the split register allocation pass
without preserving this pass, it will be freed and recomputed until it
encounters the next pass that needs LiveDebugVariables.

However, `LiveDebugVariables` will raise an assertion due to the pass
being freed without emitting a debug value.

This is reason we need `LiveDebugVariables` to be available for passes
outside of lib/Codegen.

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Revision tags: llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5
# aa2d0fbc 21-May-2023 Sergei Barannikov <barannikov88@gmail.com>

[MC] Add MCRegisterInfo::regunits for iteration over register units

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D152098


Revision tags: llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2
# 0ad1fd6a 18-Apr-2023 Akshay Khadse <akshayskhadse@gmail.com>

Fix uninitialized pointer members

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D148495


Revision tags: llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init
# 8d0383eb 24-Jun-2022 Matt Arsenault <Matthew.Arsenault@amd.com>

CodeGen: Remove AliasAnalysis from regalloc

This was stored in LiveIntervals, but not actually used for anything
related to LiveIntervals. It was only used in one check for if a load
instruction is

CodeGen: Remove AliasAnalysis from regalloc

This was stored in LiveIntervals, but not actually used for anything
related to LiveIntervals. It was only used in one check for if a load
instruction is rematerializable. I also don't think this was entirely
correct, since it was implicitly assuming constant loads are also
dereferenceable.

Remove this and rely only on the invariant+dereferenceable flags in
the memory operand. Set the flag based on the AA query upfront. This
should have the same net benefit, but has the possible disadvantage of
making this AA query nonlazy.

Preserve the behavior of assuming pointsToConstantMemory implying
dereferenceable for now, but maybe this should be changed.

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Revision tags: llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1
# 989f1c72 15-Mar-2022 serge-sans-paille <sguelton@redhat.com>

Cleanup codegen includes

This is a (fixed) recommit of https://reviews.llvm.org/D121169

after: 1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-in

Cleanup codegen includes

This is a (fixed) recommit of https://reviews.llvm.org/D121169

after: 1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121681

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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3
# a278250b 10-Mar-2022 Nico Weber <thakis@chromium.org>

Revert "Cleanup codegen includes"

This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https:/

Revert "Cleanup codegen includes"

This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169

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# 7f230fee 07-Mar-2022 serge-sans-paille <sguelton@redhat.com>

Cleanup codegen includes

after: 1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169


Revision tags: llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1
# 592f52de 03-Feb-2022 Mircea Trofin <mtrofin@google.com>

[nfc][regalloc] const LiveIntervals within the allocator

Once built, LiveIntervals are immutable. This patch captures that.

Differential Revision: https://reviews.llvm.org/D118918


Revision tags: llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1
# 34f4fe3a 31-Oct-2021 Mircea Trofin <mtrofin@google.com>

[NFC][Regalloc] Ensure Query::interferingVRegs is accurate.

To correctly use Query, one had to first call collectInterferingVRegs to
pre-cache the query result, then call interferingVRegs. Failing t

[NFC][Regalloc] Ensure Query::interferingVRegs is accurate.

To correctly use Query, one had to first call collectInterferingVRegs to
pre-cache the query result, then call interferingVRegs. Failing the
former, interferingVRegs could be stale. This did cause a bug which was
addressed in D98232, but the underlying usability issue of the Query API
wasn't.

This patch addresses the latter by making collectInterferingVRegs an
implementation detail, and having interferingVRegs play both roles. One
side-effect of this is that interferingVRegs is not const anymore.

Differential Revision: https://reviews.llvm.org/D112882

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