[CodeGen] Avoid repeated hash lookups (NFC) (#124506)

[CodeGen] Remove some implict conversions of MCRegister to unsigned by using(). NFC

Many of these are indexing BitVectors or something where we can't
using MCRegister and need the register number.

[CodeGen] Remove unused includes (NFC) (#115996)

Identified with misc-include-cleaner.

Revert "[LLVM] [X86] Fix integer overflows in frame layout for huge frames (#101840)"

This casuses assertion failures targeting 32-bit x86:

lib/Target/X86/X86RegisterInfo.cpp:989:
virtual bool

Revert "[LLVM] [X86] Fix integer overflows in frame layout for huge frames (#101840)"

This casuses assertion failures targeting 32-bit x86:

lib/Target/X86/X86RegisterInfo.cpp:989:
virtual bool llvm::X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator, int, unsigned int, RegScavenger *) const:
Assertion `(Is64Bit || FitsIn32Bits) && "Requesting 64-bit offset in 32-bit immediate!"' failed.

See comment on the PR.

> Fix 32-bit integer overflows in the X86 target frame layout when dealing
> with frames larger than 4gb. When this occurs, we'll scavenge a scratch
> register to be able to hold the correct stack offset for frame locals.
>
> This completes reapplying #84114.
>
> Fixes #48911
> Fixes #75944
> Fixes #87154

This reverts commit 0abb7791614947bc24931dd851ade31d02496977.

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[LLVM] [X86] Fix integer overflows in frame layout for huge frames (#101840)

Fix 32-bit integer overflows in the X86 target frame layout when dealing
with frames larger than 4gb. When this occurs,

[LLVM] [X86] Fix integer overflows in frame layout for huge frames (#101840)

Fix 32-bit integer overflows in the X86 target frame layout when dealing
with frames larger than 4gb. When this occurs, we'll scavenge a scratch
register to be able to hold the correct stack offset for frame locals.

This completes reapplying #84114.

Fixes #48911
Fixes #75944
Fixes #87154

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Spill/restore FP/BP around instructions in which they are clobbered (#81048)

This patch fixes https://github.com/llvm/llvm-project/issues/17204.

If a base pointer is used in a function, and it is

Spill/restore FP/BP around instructions in which they are clobbered (#81048)

This patch fixes https://github.com/llvm/llvm-project/issues/17204.

If a base pointer is used in a function, and it is clobbered by an
instruction (typically an inline asm), current register allocator can't
handle this situation, so BP becomes garbage after those instructions.
It can also occur to FP in theory.

We can spill and reload FP/BP registers around those instructions. But
normal spill/reload instructions also use FP/BP, so we can't spill them
into normal spill slots, instead we spill them into the top of stack by
using SP register.

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[AArch64] Add streaming-mode stack hazard optimization remarks (#101695)

Emit an optimization remark when objects in the stack frame may cause
hazards in a streaming mode function. The analysis req

[AArch64] Add streaming-mode stack hazard optimization remarks (#101695)

Emit an optimization remark when objects in the stack frame may cause
hazards in a streaming mode function. The analysis requires either the
`aarch64-stack-hazard-size` or `aarch64-stack-hazard-remark-size` flag
to be set by the user, with the former flag taking precedence.

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[LLVM] [MC] Update frame layout & CFI generation to handle frames larger than 2gb (#99263)

Rebase of #84114. I've only included the core changes to frame layout
calculation & CFI generation which s

[LLVM] [MC] Update frame layout & CFI generation to handle frames larger than 2gb (#99263)

Rebase of #84114. I've only included the core changes to frame layout
calculation & CFI generation which sidesteps the regressions found after
merging #84114. Since these changes are a necessary precursor to the
overall fix and are themselves slightly beneficial as CFI is now
generated correctly, I think it is reasonable to merge this first step.

---

For very large stack frames, the offset from the stack pointer to a
local can be more than 2^31 which overflows various `int` offsets in the
frame lowering code.

This patch updates the frame lowering code to calculate the offsets as
64-bit values and fixes CFI to use the corrected sizes.

After this patch, additional work is needed to fix offset truncations in
each target's codegen.

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[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)

- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.

[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result (#94571)

Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree v

[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result (#94571)

Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.

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Fix typo "indicies" (#92232)

Revert rG58de1e2c5eee548a9b365e3b1554d87317072ad9 "Fix stack layout for frames larger than 2gb (#84114)"

This is failing on some EXPENSIVE_CHECKS buildbots

Fix stack layout for frames larger than 2gb (#84114)

For very large stack frames, the offset from the stack pointer to a local can be more than 2^31 which overflows various `int` offsets in the fram

Fix stack layout for frames larger than 2gb (#84114)

For very large stack frames, the offset from the stack pointer to a local can be more than 2^31 which overflows various `int` offsets in the frame lowering code.

This patch updates the frame lowering code to calculate the offsets as 64-bit values and resolves the overflows, resulting in the correct codegen for very large frames.

Fixes #48911

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Revert "Move assertion for AdjustsStack from PEI to MachineVerifier. (#85698)"

This reverts commit 05bde30585710a51592eee0a6cf6df8184d09c92.

Reverting due to verifier complaints with expensive chec

Revert "Move assertion for AdjustsStack from PEI to MachineVerifier. (#85698)"

This reverts commit 05bde30585710a51592eee0a6cf6df8184d09c92.

Reverting due to verifier complaints with expensive checks on build-bot.

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Move assertion for AdjustsStack from PEI to MachineVerifier. (#85698)

Have the verifier report a missing AdjustsStack flag rather than waiting until
PEI asserts.

[CodeGen] Fix -Wunused-variable in PrologEpilogInserter.cpp (NFC)

llvm-project/llvm/lib/CodeGen/PrologEpilogInserter.cpp:369:12:
error: unused variable 'MaxCFSIn' [-Werror,-Wunused-variable]
uint3

[CodeGen] Fix -Wunused-variable in PrologEpilogInserter.cpp (NFC)

llvm-project/llvm/lib/CodeGen/PrologEpilogInserter.cpp:369:12:
error: unused variable 'MaxCFSIn' [-Werror,-Wunused-variable]
uint32_t MaxCFSIn =
^
1 error generated.

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[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001)

- Use computeMaxCallFrameSize() in PEI::calculateCallFrameInfo() instead of duplicating the code.

- Set AdjustsStack

[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001)

- Use computeMaxCallFrameSize() in PEI::calculateCallFrameInfo() instead of duplicating the code.

- Set AdjustsStack in FinalizeISel instead of in computeMaxCallFrameSize().

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[RegScavenger] Simplify state tracking for backwards scavenging (#71202)

Track the live register state immediately before, instead of after,
MBBI. This makes it simple to track the state at the sta

[RegScavenger] Simplify state tracking for backwards scavenging (#71202)

Track the live register state immediately before, instead of after,
MBBI. This makes it simple to track the state at the start or end of a
basic block without a separate (and poorly named) Tracking flag.

This changes the API of the backward(MachineBasicBlock::iterator I)
method, which now recedes to the state just before, instead of just
after, *I. Some clients are simplified by this change.

There is one small functional change shown in the lit tests where
multiple spilled registers all need to be reloaded before the same
instruction. The reloads will now be inserted in the opposite order.
This should not affect correctness.

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[CodeGen][Remarks] Add the function name to the stack size remark (#69346)

It is already present in the yaml, but missing from the printed
diagnostics.

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future chang

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.

This matches other nearby enums.

For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::

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[PEI][PowerPC] Fix false alarm of stack size limit (#65559)

PPC64 allows stack size up to ((2^63)-1) bytes. Currently llc reports
```
warning: stack frame size (4294967568) exceeds limit (42949672

[PEI][PowerPC] Fix false alarm of stack size limit (#65559)

PPC64 allows stack size up to ((2^63)-1) bytes. Currently llc reports
```
warning: stack frame size (4294967568) exceeds limit (4294967295) in function 'main'
```
if the stack allocated is larger than 4G.

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[PEI] Remove support for register scavenging during forwards frame index elimination

All targets that require register scavenging now use backwards frame
index elimination.

Differential Revision: h

[PEI] Remove support for register scavenging during forwards frame index elimination

All targets that require register scavenging now use backwards frame
index elimination.

Differential Revision: https://reviews.llvm.org/D156986

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[PEI] Switch to backwards frame index elimination by default

Also rename the flag from supportsBackwardScavenger to
eliminateFrameIndicesBackwards to reflect what it actually does.

X86 is the only

[PEI] Switch to backwards frame index elimination by default

Also rename the flag from supportsBackwardScavenger to
eliminateFrameIndicesBackwards to reflect what it actually does.

X86 is the only target still using forwards frame index elimination.
This will not block removing support for forwards register scavenging,
because X86 does not use the register scavenger.

Differential Revision: https://reviews.llvm.org/D156983

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[PEI][PowerPC] Switch to backwards frame index elimination

This adds support for reprocessing new instructions that were generated
by the target's eliminateFrameIndex.

Backwards frame index elimina

[PEI][PowerPC] Switch to backwards frame index elimination

This adds support for reprocessing new instructions that were generated
by the target's eliminateFrameIndex.

Backwards frame index elimination uses backwards register scavenging,
which is preferred because it does not rely on accurate kill flags.

Differential Revision: https://reviews.llvm.org/D156690

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[PEI] Don't zero out noreg operands

A tail call may have $noreg operands.

Fixes a crash.

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D156485