History log of /llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp (Results 301 – 325 of 480)
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Revision tags: llvmorg-3.4.0-rc2, llvmorg-3.4.0-rc1
# d12ccbd3 19-Nov-2013 Juergen Ributzka <juergen@apple.com>

[weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed.

[weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064

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# 49109a27 18-Nov-2013 Alexey Samsonov <samsonov@google.com>

Revert r194865 and r194874.

This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
Base *foo = new Child();
delete foo;
will not

Revert r194865 and r194874.

This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
Base *foo = new Child();
delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997

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# dbedae89 15-Nov-2013 Juergen Ributzka <juergen@apple.com>

[weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandl

[weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 194865

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# 88dd0abd 10-Oct-2013 Matthias Braun <matze@braunis.de>

Pass LiveQueryResult by value

This makes the API a bit more natural to use and makes it easier to make
LiveRanges implementation details private.

llvm-svn: 192394


# dc4c1adf 24-Sep-2013 Andrew Trick <atrick@apple.com>

Comment typo.

llvm-svn: 191312


# 978674b2 20-Sep-2013 Andrew Trick <atrick@apple.com>

Allow subtarget selection of the default MachineScheduler and document the interface.

The global registry is used to allow command line override of the
scheduler selection, but does not work well as

Allow subtarget selection of the default MachineScheduler and document the interface.

The global registry is used to allow command line override of the
scheduler selection, but does not work well as the normal selection
API. For example, the same LLVM process should be able to target
multiple targets or subtargets.

llvm-svn: 191071

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# 665d3ec3 19-Sep-2013 Andrew Trick <atrick@apple.com>

Rename ConvergingScheduler to GenericScheduler.

This was an experimental scheduler a year ago. It's now used by
several subtargets, both in-order and out-of-order, and it
is about to be enabled by d

Rename ConvergingScheduler to GenericScheduler.

This was an experimental scheduler a year ago. It's now used by
several subtargets, both in-order and out-of-order, and it
is about to be enabled by default for x86 and armv7. It will be the
new GenericScheduler for subtargets that don't provide their own
SchedulingStrategy.

llvm-svn: 191051

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# 6c88b350 09-Sep-2013 Andrew Trick <atrick@apple.com>

Enable -misched-cyclicpath by default.

llvm-svn: 190367


# e1f7bf2c 09-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: smooth out the cyclicpath heuristic.

Arnold's idea.

I generally try to avoid stateful heuristics because it can make
debugging harder. However, we need a way to prevent the latency
priori

mi-sched: smooth out the cyclicpath heuristic.

Arnold's idea.

I generally try to avoid stateful heuristics because it can make
debugging harder. However, we need a way to prevent the latency
priority from dominating, and it somewhat makes sense to schedule
aggressively for latency only within an issue group.

Swift in particular likes this, and it doesn't hurt anyone else:
| Benchmarks/MiBench/consumer-lame | 10.39% |
| Benchmarks/Misc/himenobmtxpa | 9.63% |

llvm-svn: 190360

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# b248b4a1 06-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: cleanup register pressure update, remove a FIXME.

llvm-svn: 190181


# c573cd90 06-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: improve regpressure tracing.

llvm-svn: 190180


# 7609b7d1 06-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: print tree size in -view-misched-dags

llvm-svn: 190179


# ffdbefb9 06-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: register pressure update tracing.

llvm-svn: 190178


# ddffae90 06-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: Reorder Cyclicpath (latency) and CriticalMax (pressure) heuristics.

The latency based scheduling could induce spills in some cases.

llvm-svn: 190177


# 75e411cc 06-Sep-2013 Andrew Trick <atrick@apple.com>

Added MachineSchedPolicy.

Allow subtargets to customize the generic scheduling strategy.
This is convenient for targets that don't need to add new heuristics
by specializing the strategy.

llvm-svn:

Added MachineSchedPolicy.

Allow subtargets to customize the generic scheduling strategy.
This is convenient for targets that don't need to add new heuristics
by specializing the strategy.

llvm-svn: 190176

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# ed20075d 04-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: Force bottom up scheduling for generic targets.

Fast register pressure tracking currently only takes effect during
bottom up scheduling. Forcing this is a bit faster and simpler for
target

mi-sched: Force bottom up scheduling for generic targets.

Fast register pressure tracking currently only takes effect during
bottom up scheduling. Forcing this is a bit faster and simpler for
targets that don't have many scheduling constraints and don't need
top-down scheduling.

llvm-svn: 190014

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# b05db8e0 04-Sep-2013 Andrew Trick <atrick@apple.com>

comment typo

llvm-svn: 189997


# 2a749ee0 04-Sep-2013 Andrew Trick <atrick@apple.com>

Remove dead subtree limit code.

llvm-svn: 189995


# 856ecd9a 04-Sep-2013 Andrew Trick <atrick@apple.com>

-view-misched-dags, better pruning.

llvm-svn: 189994


# ef54c594 04-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: DEBUG cleanup, call tracePick for unidirectional scheduling.

llvm-svn: 189993


# 1ab16d9e 04-Sep-2013 Andrew Trick <atrick@apple.com>

80 columns

llvm-svn: 189992


# 66c3dfbf 04-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: Suppress register pressure tracking when the scheduling window is too small.

If the instruction window is < NumRegs/2, pressure tracking is not
likely to be effective. The scheduler has to

mi-sched: Suppress register pressure tracking when the scheduling window is too small.

If the instruction window is < NumRegs/2, pressure tracking is not
likely to be effective. The scheduler has to process a very large
number of tiny blocks. We want this to be fast.

llvm-svn: 189991

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# a6e87770 04-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: Load clustering is a bit to expensive to enable unconditionally.

llvm-svn: 189990


# 8c699c93 04-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: Reuse an invalid HazardRecognizer to save compile time.

llvm-svn: 189989


# 310190e2 04-Sep-2013 Andrew Trick <atrick@apple.com>

mi-sched: bypass heuristic checks when regpressure tracking is disabled.

llvm-svn: 189988


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